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ADS1263 Datasheet(PDF) 10 Page - Texas Instruments |
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ADS1263 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 133 page  ADS1262, ADS1263 SBAS661B – FEBRUARY 2015 – REVISED JULY 2015 www.ti.com Electrical Characteristics (continued) Minimum and maximum specifications apply from TA = –40°C to +125°C. Typical specifications are at TA = 25°C. All specifications are at VAVDD = 5 V, VAVSS = 0 V, VDVDD = 3.3 V, VREF = 2.5 V, fCLK = 7.3728 MHz, ADC1 data rate = 20 SPS with PGA enabled and gain = 1, and ADC2 data rate = 10 SPS with gain = 1 (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PGA OVER-RANGE MONITOR Differential alarm Threshold ±105% FSR Differential alarm accuracy ±1% ±3% Low threshold VAVSS + 0.2 V Absolute alarm thresholds High threshold VAVDD – 0.2 V ADC CLOCK fCLK Internal oscillator frequency 7.3728 MHz Internal oscillator accuracy ±0.5% ±2% External crystal startup time See Table 25 for recommended crystals 20 ms GENERAL-PURPOSE INPUT/OUTPUTS (GPIO)(6) VOH High-level output voltage IOH = 1 mA 0.8 · VAVDD V VOL Low-level output voltage IOL = –1 mA 0.2 · VAVDD V VIH High-level input voltage 0.7 · VAVDD VAVDD V VIL Low-level input voltage VAVSS 0.3 · VAVDD V Input hysteresis 0.5 V DIGITAL INPUT/OUTPUT (Other Than GPIO) IOH = 1 mA 0.8 · VDVDD V VOH High-level output voltage IOH = 8 mA 0.75 · VDVDD V IOL = –1 mA 0.2 · VDVDD V VOL Low-level output voltage IOL = –8 mA 0.2 · VDVDD V VIH High-level input voltage 0.7 · VDVDD VDVDD V VIL Low-level input voltage VDGND 0.3 · VDVDD V Input hysteresis 0.1 V Input leakage ±10 µA POWER SUPPLY Active mode, ADS1262 4 mA voltage reference off Active mode, ADS1262 4.2 6.5 mA IAVDD voltage reference on Analog supply current IAVSS Active mode, ADS1263 4.3 6.5 mA voltage reference on Power-down mode 2 15 µA ADS1262 Active mode 1 1.25 mA ADS1263 IDVDD Digital supply current Power-down mode(7) 25 50 µA Active mode, ADS1262 24 37 mW voltage reference on PD Power dissipation Active mode, ADS1263 25 37 mW voltage reference on Power-down mode 90 240 µW (6) GPIO input and output voltages are referenced to VAVSS. (7) External CLK input stopped. All other digital inputs maintained at VDVDD or VDGND. 10 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS1262 ADS1263 |
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