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BTS640S2 Datasheet(PDF) 7 Page - Infineon Technologies AG |
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BTS640S2 Datasheet(HTML) 7 Page - Infineon Technologies AG |
7 / 15 page BTS 640 S2 Semiconductor Group Page 7 2003-Oct-01 Truth Table Input Output Status Current Sense level level level IIS Normal operation L H L H H L 0 nominal Current- limitation L H L H H H 0 0 Short circuit to GND L H L L16) H H 0 0 Over- temperature L H L L H H 0 0 Short circuit to Vbb L H H H L17) L 0 <nominal 18) Open load L H L19) H H (L20)) L 0 0 Undervoltage L H L L H L 0 0 Overvoltage L H L L H L 0 0 Negative output voltage clamp L L H 0 L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit H = "High" Level Status signal after the time delay shown in the diagrams (see fig 5. page 12...13) 16 ) The voltage drop over the power transistor is Vbb-VOUT>typ.3V. Under this condition the sense current IIS is zero 17) An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious. 18 ) Low ohmic short to Vbb may reduce the output current IL and therefore also the sense current IIS. 19 ) Power Transistor off, high impedance 20 ) with external resistor between pin 4 and pin 6&7 |
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