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P82B96D Datasheet(PDF) 8 Page - Texas Instruments |
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P82B96D Datasheet(HTML) 8 Page - Texas Instruments |
8 / 34 page P82B96 SCPS144C – MAY 2006 – REVISED MAY 2015 www.ti.com 7.7 Electrical Characteristics: VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V, voltages are specified with respect to GND (unless otherwise noted) TA = 25°C TA = –40°C to 85°C PARAMETER TEST CONDITIONS UNIT MIN TYP(1) MAX MIN MAX Temperature ΔV/ΔTIN coefficient of input Sx, Sy –2 mV/°C thresholds ISx, ISy = 3 mA 0.8 0.88 1 See (2) Low-level output VOL Sx, Sy V voltage ISx, ISy = 0.2 mA 0.67 0.73 0.79 See (2) Temperature coefficient of ΔV/ΔTOUT Sx, Sy ISx, ISy = 0.2 mA –1.8 mV/°C output low levels(3) ICC Quiescent supply current Sx = Sy = VCC 0.9 1.8 2 mA Additional supply ΔICC current Tx, Ty 1.7 2.75 3 mA per pin low Dynamic output VSx, VSy > 2 V, sink capability 7 18 6 mA VRx, VRy = low on I2C bus IIOS Sx, Sy Leakage current VSx, VSy = 5 V, 0.1 1 1 μA on I2C bus VRx, VRy = high Dynamic output VTx, VTy > 1 V, sink capability VSx, VSy = low on I 2C bus = 60 100 60 mA on buffered bus 0.4 V IIOT Tx, Ty Leakage current VTx, VTy = VCC = 5 V, 0.1 1 1 μA on buffered bus VSx, VSy = high Input current Sx, Sy Bus low, VRx, VRy = high –1 1 from I2C bus Input current Bus low, VRx, VRy = 0.4 V –1 1 II from buffered bus μA Rx, Ry Leakage current on buffered bus VRx, VRy = VCC 1 1.5 input Input logic-level high threshold(4) 0.65 0.7 See (2) on normal I2C bus Sx, Sy Input logic-level low threshold(4) 0.6 0.65 See (2) on normal I2C bus VIT Input threshold V 0.58 x Input logic level high 0.58 x VCC VCC Rx, Ry Input threshold 0.5 x VCC 0.42 x 0.42 x Input logic level low VCC VCC (VSx output low at 3 mA) – Input/output logic VIOdiff Sx, Sy (VSx input high max) for I 2C 100 150 100 mV level difference(5) applications VCC voltage at Sx, Sy are low, VCC Sx, Sy VIOrel which all buses ramping, voltage on Tx, Ty 1 1 V Tx, Ty are released lowered until released (1) Typical value is at VCC = 5 V, TA = 25°C (2) See the Typical Characteristics section of this data sheet. (3) The output logic low depends on the sink current. (4) The input logic threshold is independent of the supply voltage. (5) The minimum value requirement for pullup current, 200 μA, ensures that the minimum value for VSX output low always exceeds the minimum VSx input high level to eliminate any possibility of latching. The specified difference is specified by design within any device. While the tolerances on absolute levels allow a small probability that the low from one Sx output is recognized by an Sx input of another P82B96, this has no consequences for normal applications. 8 Submit Documentation Feedback Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: P82B96 |
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