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SN65DP141 Datasheet(PDF) 3 Page - Texas Instruments |
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SN65DP141 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 32 page Thermal Pad 1 IN0_P 2 IN0_N 3 VCC 4 IN1_P 5 IN1_N 6 VCC 7 VCC OUT0_P 8 IN2_P 9 IN2_N OUT0_N VCC OUT1_P OUT1_N VCC VCC OUT2_P OUT2_N VCC OUT3_P OUT3_N VCC IN3_P IN3_N 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 3 SN65DP141 www.ti.com SLLSES6 – FEBRUARY 2016 Product Folder Links: SN65DP141 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 5 Pin Configuration and Functions RLJ Package 38 Pins (WQFN) Top View It is required for thermal pad to be soldered to ground for better thermal performance. Pin Functions PIN I/O DESCRIPTION NAME NO. DIFFERENTIAL HIGH-SPEED I/O IN0_P 1 I Differential input, lane 0 (with 50 Ω termination to input common mode) IN0_N 2 I IN1_P 4 I Differential input, lane 1 (with 50 Ω termination to input common mode) IN1_N 5 I IN2_P 8 i Differential input, lane 2 (with 50 Ω termination to input common mode) IN2_N 9 I IN3_P 11 I Differential input, lane 3 (with 50 Ω termination to input common mode) IN3_N 12 I OUT0_P 31 O Differential output, lane 0 OUT0_N 30 O OUT1_P 28 O Differential output, lane 1 OUT1_N 27 O OUT2_P 24 O Differential output, lane 2 OUT2_N 23 O OUT3_P 21 O Differential output, lane 3 OUT3_N 20 O |
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