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Q67060-S6128 Datasheet(PDF) 10 Page - Infineon Technologies AG |
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Q67060-S6128 Datasheet(HTML) 10 Page - Infineon Technologies AG |
10 / 19 page 2004-01-27 Page 10 BTS 4142N Terms Inductive and overvoltage output clamp + V bb OUT GND V Z V ON PROFET V IN OUT GND bb VIN IIN V bb Ibb IL VOUT IGND VON RGND VON clamped to 63 V min. Input circuit (ESD protection) Overvoltage protection of logic part IN GND I R I I Vbb + Vbb IN GND GND R Signal GND Logic VZ2 optional The use of ESD zener diodes as voltage clamp at DC conditions is not recommended VZ2=Vbb(AZ)=47V min., RI=3 kΩ typ., RGND=150Ω Reverse battery protection GND Logic IN OUT L R Power GND GND R Signal GND Power Inverse I R Vbb - Diode optional RGND=150Ω, RI=3kΩ typ., Temperature protection is not active during inverse current |
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