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SN74LV00APWG4 Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LV00APWG4 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 27 page Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN54LV00A, SN74LV00A SCLS389K – SEPTEMBER 1997 – REVISED FEBRUARY 2015 Quadruple 2-Input Positive-NAND Gates 1 Features 2 Applications 1 • 2-V to 5.5-V VCC Operation • Power Infrastructure • Max tpd of 6.5 ns at 5 V • Network Switch • Typical VOLP (Output Ground Bounce) • Automotive Infotainment < 0.8 V at VCC = 3.3 V, TA = 25°C • Servers • Typical VOHV (Output VOH Undershoot) 3 Description > 2.3 V at VCC = 3.3 V, TA = 25°C These quadruple 2-input positive-NAND gates are • Support Mixed-Mode Voltage Operation on designed for 2-V to 5.5-V VCC operation. All Ports • Ioff Supports Live Insertion, Partial Power Down The SNx4LV00A devices perform the boolean function Y = A ● B or Y = A + B in positive logic. Mode, and Back Drive Protection • Latch-Up Performance Exceeds 250 mA Device Information(1) Per JESD 17 PART NUMBER PACKAGE BODY SIZE (NOM) • ESD Protection Exceeds JESD 22 VQFN (14) 3.50 mm x 3.50 mm – 2000-V Human-Body Model SOIC (14) 8.65 mm × 3.91 mm – 200-V Machine Model SNx4LV00A SOP (14) 10.30 mm x 5.30 mm SSOP (14) 6.20 mm x 5.30 mm – 1000-V Charged-Device Model TSSOP (14) 5.00 mm x 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Simplified Schematic 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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