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SN74LVC1G19DCKRG4 Datasheet(PDF) 10 Page - Texas Instruments |
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SN74LVC1G19DCKRG4 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 29 page Y 0 Y 1 SN74LVC1G19 SCES464G – JUNE 2003 – REVISED AUGUST 2015 www.ti.com 8 Detailed Description 8.1 Overview This decoder/demultiplexer is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G19 device is a 1-of-2 decoder/demultiplexer. This device decodes the 1-bit address on input A and places a logic low on the matching address output, Y0 or Y1 , when the enable (E) input signal is low. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. 8.2 Functional Block Diagram 8.3 Feature Description SN74LVC1G19 is available in NanoFree package. NanoFree is a major breakthrough in IC packaging concepts, it is a bare die package developed for applications that require the smallest possible package. The device supports 5-V VCC Operation. All Inputs accept voltages up to 5.5 V. ±24-mA output drive at 3.3 V. The maximum time propagation delay (tpd ) is 5.4 ns at 3.3 V. Low Power Consumption, 10-μA Max ICC. Typical output ground bounce (VOLP ) and Output VOH Undershoot (VOHV). This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The SN74LVC1G19 device has isolation during power off. Ioff supports live insertion, partial- power-down mode and back drive protection. 8.4 Device Functional Modes Table 1 lists the functional modes of the SN74LVC1G19. Table 1. Function Table INPUTS OUTPUTS E A Y0 Y1 L L L H L H H L H X H H 10 Submit Documentation Feedback Copyright © 2003–2015, Texas Instruments Incorporated Product Folder Links: SN74LVC1G19 |
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