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VNQ7140AJTR Datasheet(PDF) 14 Page - STMicroelectronics

Part # VNQ7140AJTR
Description  Quad channel high-side driver with MultiSense analog feedback
Download  46 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VNQ7140AJTR Datasheet(HTML) 14 Page - STMicroelectronics

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Electrical specification
VNQ7140AJ
7 V < VCC < 18 V; -40°C < Tj < 150°C
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
ISENSEH
MultiSense output
current in fault
condition
VCC = 13 V; VSENSE = 5 V
7
20
30
mA
MultiSense timings (current sense mode - see Figure 7: "MultiSense timings (current sense
mode)")(4)
tDSENSE1H
Current sense
settling time from
rising edge of SEn
VIN = 5 V; VSEn = 0 V to 5 V;
RSENSE = 1
kΩ; RL = 13 Ω
60
µs
tDSENSE1L
Current sense
disable delay time
from falling edge of
SEn
VIN = 5 V; VSEn = 0 V to 5 V;
RSENSE = 1
kΩ; RL = 13 Ω
5
20
µs
tDSENSE2H
Current sense
settling time from
rising edge of
INPUT
VIN = 0 V to 5 V; VSEn = 5 V;
RSENSE = 1
kΩ; RL = 13 Ω
100
250
µs
ΔtDSENSE2H
Current sense
settling time from
rising edge of IOUT
(dynamic response
to a step change of
IOUT)
VIN = 5 V; VSEn = 5 V;
RSENSE = 1
kΩ; ISENSE = 90 % of
ISENSEMAX; RL = 13
Ω
100
µs
tDSENSE2L
Current sense turn-
off delay time from
falling edge of
INPUT
VIN = 5 V to 0 V; VSEn = 5 V;
RSENSE = 1
kΩ; RL = 13 Ω
50
250
µs
MultiSense timings (chip temperature sense mode - see Figure 8: "Multisense timings (chip
temperature and VCC sense mode)")(4)
tDSENSE3H
VSENSE_TC settling
time from rising
edge of SEn
VSEn = 0 V to 5 V; VSEL0 = 0 V;
VSEL1,2 = 5 V; RSENSE = 1
kΩ
60
µs
tDSENSE3L
VSENSE_TC disable
delay time from
falling edge of SEn
VSEn = 5 V to 0 V; VSEL0 = 0 V;
VSEL1,2 = 5 V; RSENSE = 1
kΩ
20
µs
MultiSense timings (VCC voltage sense mode - see Figure 8: "Multisense timings (chip
temperature and VCC sense mode)")(4)
tDSENSE4H
VSENSE_VCC settling
time from rising
edge of SEn
VSEn = 0 V to 5 V; VSEL0,1,2 = 5 V;
RSENSE = 1
kΩ
60
µs
tDSENSE4L
VSENSE_VCC disable
delay time from
falling edge of SEn
VSEn = 5 V to 0 V; VSEL0,1,2 = 5 V;
RSENSE = 1
kΩ
20
µs
MultiSense timings (multiplexer transition times)(4)
tD_XtoY
MultiSense
transition delay
from ChX to ChY
VIN0 = 5 V; VIN1 = 5 V; VSEn = 5 V;
VSEL1,2 = 0 V; VSEL0 = 0 V to 5 V;
IOUT0 = 0 A; IOUT1 = 1A;
RSENSE = 1
kΩ
20
µs
14/46
DocID027404 Rev 1


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