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SLE66C42PM5 Datasheet(PDF) 3 Page - Infineon Technologies AG |
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SLE66C42PM5 Datasheet(HTML) 3 Page - Infineon Technologies AG |
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3 / 7 page  SLE 66C42P Short Product Information 3 / 8 11.02 16-Bit Security Controller with MMU in 0.22 µm CMOS Technology 64-Kbyte ROM, 2304 bytes RAM, 4-Kbyte EEPROM 112-Bit / 192-Bit DDES-EC2 Accelerator Features • 16-bit microcomputer in 0.22 µm CMOS technology • Instruction set opcode compatible with standard SAB 8051 processor • Enhanced 16-bit arithmetic • Additional powerful instructions optimized for chip card applications • Dedicated, non-standard architecture with execution time 6 times faster (18 times by PLLmax) than standard SAB 8051 processor at same external clock • 62 Kbytes User ROM for application programs • Additional 2 Kbytes reserved ROM for Resource Management System (RMS+ Superslim) with intelligent EEPROM write/erase routines • 4 Kbytes Superslim-EEPROM • 2 Kbytes XRAM, 256 Bytes IRAM • Memory Management and Protection Unit (MMU) • Dual Key Triple DES (DDES) and EC2 GF (2 n) Accelerator • CRC Module • Interrupt Module • Two 16-bit Autoreload Timer • PLL up to 15 MHz • Power saving sleep mode • External clock frequency 1 to 7.5 MHz for internal clock ≤ 15 MHz • UART for handling serial interface in accordance with ISO/IEC 7816 part 3 supporting transmission protocols T=1 and T=0 • I/O routines realized in software executable • Supply voltage range: 2.7 Vto 5.5 V • Current consumption < 10mA @ 5.5 V < 6 mA @ 3.3 V • Temperature range: -25 to +85°C • ESD protection larger than 6 kV Superslim-EEPROM • Reading and programming byte by byte • Flexible page mode for 1 to 64 bytes write/erase operation • 32 bytes security area (OTP) • Fast personalization mode 0.63 ms • Erase + Write time < 4.0 ms @ 15 MHz • Minimum of 500.000 write/erase cycles at 25°C • Data retention for a minimum of 10 years • EEPROM programming voltage generated on chip Memory Management and Protection Unit • Addressable memory up to 1 Mbyte • Separates OS (system) and application (user) • System routines called by traps • OS can restrict access to peripherals in application mode • Code execution from XRAM possible Security Features Operation state monitoring mechanism • Low and high voltage sensors • Frequency sensors and filters • Light Sensor • Glitch Sensor • Temperature Sensor • Life Test Function for Sensors |
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