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TLE4941-2C Datasheet(PDF) 5 Page - Infineon Technologies AG |
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TLE4941-2C Datasheet(HTML) 5 Page - Infineon Technologies AG |
5 / 8 page TLE4941-2, TLE4941-2C Supplement TLE4941-2 - TLE4941-2C February 2002 Datasheet supplement 5 Example: ∆B = 10mT sin (ωt + ϕ). ϕ = 30° Typical startup-behaviour at a sinusoidal input signal of 10mT amplitude, initial phase= 30°. ϕ 1 43,6° 2 133,9° 3 333,2° 4 513,2° 5 693,2° 6 900° 7 1080° 8 1260° 9 1440° 10 ... ∆ ϕ 90,3° (PGA, uncal) 199,3° (PGA, uncal) 180° (uncal) 180° (uncal) 206,8° (Offset- correction) 180° (cal) 180° (cal) 180° (cal) 180° (cal) → This corresponds to row 14 in the table, behaviour similar to Fig. 1 As a special (and rare) case instead of an offset correction after edge number 5, a further (extra) PGA switching could occur before edge number 5. PGA switching inhibits an immediate offset update. It can happen if one of the signal peaks is exactly at a PGA switching threshold (speed-ADC overflow). In this case the offset update (switching from uncalibrated mode to calibrated mode) would be delayed by two to three further edges. The referring phase shifts of the example would then be as follows: ϕ 1 43,6° 2 133,9° 3 333,2° 4 513,2° 5 727,5° 6 907,5° 7 1087,5° 8 1260° 9 1440° 10 ... ∆ ϕ 90,3° (PGA, uncal) 199,3° (PGA, uncal) 180° (uncal) 214,3° (extra PGA) 180° (uncal) 180° (uncal) 172,5° (Offset- correction) 180° (cal) 180° (cal) → This corresponds to row 13 of the table. Circuit Description See TLE4941 data sheet |
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Similar Description - TLE4941-2C |
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