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TLE4942-2 Datasheet(PDF) 7 Page - Infineon Technologies AG |
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TLE4942-2 Datasheet(HTML) 7 Page - Infineon Technologies AG |
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7 / 9 page  TLE4942-2, TLE4942-2C Supplement TLE4942-2 - TLE4942-2C Data sheet supplement February 2002 7 2 Additions/Changes for TLE4942–2 versus TLE4942 (All values are valid for constant amplitude and offset of input signal, f<2500Hz) Parameter Symbol min. typ. max. Unit Conditions Signal behaviour after undervoltage or standstill>tStop nDZ-Start 2 3 pulses pulses Magnetic edge amplitude according to startup early Limit, B ˆ ∆ Edges that occur before nDZ-Start can be suppressed 1Hz ≤ f ≤ 2000Hz f > 2000Hz td,input has to be taken into account 38 45 52 µs Shortest time delay between pulse 0 (stop pulse) and pulse 1 td,input has to be taken into account 38 45 52 µs Shortest time delay between wheel speed pulse 1 and 2 Systematic phase error of output pulses during startup- and uncalibrated mode -88 +88 ° Systematical phase error of “uncal” pulse; nth vs. n+1th pulse (does not include jitter) Phase shift change during PGA switching 0 80 ° Phase shift change during transition from uncalibrated to calibrated mode ∆Φ switch -90 +90 ° Number of pulses in uncalibrated mode nDZ-Startup 6 pulses in rare cases (see appendix B) nDZ-Startup 8 pulses Number of pulses with invalid supplementary information nDR-Startup 9 pulses After nDR-Startup pulses the supplementary information is correct (starting with the nDR-Startup+1-th pulse the pulse length is correct) in rare cases (see application notes) nDR-Startup 11 pulses |
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