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TLE6286G Datasheet(PDF) 7 Page - Infineon Technologies AG |
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TLE6286G Datasheet(HTML) 7 Page - Infineon Technologies AG |
7 / 19 page Target Data TLE 6286 Version 1.02 7 2001-10-15 In case the voltage regulator control input is not connected to INH output or the microcontroller is active respectively, the TLE6286 can be set in normal operation mode without a wake-up via the communication bus. 2.2 LIN Transceiver The LIN Transceiver has already a pull up resistor of 30k Ω as termination implemented. There is also a diode in this path, to protect the circuit from feedback of voltages from the bus line to the power supply. To configure the TLE 6286 as a master node, an additional external termination resistor of 1k Ω is required. To avoid reverse currents from the bus line into the battery supply line in case of an unpowered node, it is also recommended to place a diode in series to the external pull up. For small systems (low bus capacitance) the EMC performance of the system is supported by an additional capacitor of at least 1nF in the master node (see figure 6, application circuit). An capacitor of 10µF at the supply voltage input VS buffers the input voltage. In combination with the required reverse polarity diode this prevents the device from detecting power down conditions in case of negative transients on the supply line. 2.3 Voltage Regulator The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. If the externally scaled down output voltage at the reset threshold input drops below 1.35 V, the external reset delay capacitor is discharged by the reset generator. When the voltage of the capacitor reaches the lower threshold V DRL, a reset signal occurs at the reset output and is held until the upper threshold V DU is exceeded. If the reset threshold input is connected to GND, reset is triggered at an output voltage of typ. 4.65 V. A connected microcontroller will be monitored through the watchdog logic. In case of missing pulses at pin W, the reset output is set to low. The pulse sequence time can be set in a wide range with the reset delay capacitor. The IC can be switched at the TTL-compatible, low-active inhibit input. The IC also incorporates a number of internal circuits for protection against overload, overtemperature, reverse polarity 2.4 Input Capacitor The input capacitor C I is necessary for compensation of line influences. Using a resistor of approx. 1 Ω in series with C I, the oscillating circuit consisting of input inductivity and input capacitance can be damped. The output capacitor is necessary for the stability of the regulating circuit. Stability is guaranteed at values ≥ 22 µF and an ESR of ≤ 3 Ω within the operating temperature range. For small tolerances of the reset delay the spread of the capacitance of the delay capacitor and its temperature coefficient should be noted. |
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