ADN2905 datasheet(4/27 Pages) AD

Part #	ADN2905

Description	CPRI and 10G Ethernet Data Recovery IC with Amp/EQ from 614.4 Mbps to 10.3125 Gbps

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ADN2905

Data Sheet

Rev. A | Page 4 of 27

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

VCC1

2.4576 Gbps

31.7

mA

3.072 Gbps

16.2

mA

4.9152 Gbps

31.8

mA

6.144 Gbps

16.1

mA

9.8304 Gbps

32.8

mA

TOTAL POWER DISSIPATION

0 dB EQ input mode, clock output disabled

2.4576 Gbps

305.7

mW

3.072 Gbps

249.3

mW

4.9152 Gbps

304.5

mW

6.144 Gbps

287.7

mW

9.8304 Gbps

349.5

mW

OPERATING TEMPERATURE RANGE

−40

+85

°C

1 This typical acquisition specification applies to all selectable reference clock frequencies in the range of 11.05 MHz to 176.8 MHz.

JITTER SPECIFICATIONS

TA = TMIN to TMAX, VCC = VCCMIN to VCCMAX, VCC1 = VCC1MIN to VCC1MAX, VDD = VDDMIN to VDDMAX, VEE = 0 V, input data pattern =

PRBS 223 − 1, ac-coupled to 100 Ω differential termination load, I2C register default settings, unless otherwise noted.

Table 2.

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

TRANSMITTER JITTERS

Deterministic Jitter

T_DJ

CPRI = 9.8304 Gbps, K28.5 + D5.6 and K28.5 + D16.2

6.98

ps

Random Jitter

T_RJ

CPRI = 9.8304 Gbps, K28.5 + D5.6 and K28.5 + D16.2

0.36

ps

Duty Cycle Distortion

T_DCD

CPRI = 9.8304 Gbps, K28.5 + D5.6 and K28.5 + D16.2

0.57

ps

Total Jitter

TJ

SFF-8431, 64B/66B, 10.3125 Gbps

13.6

ps

Data Dependent Jitter

DDJ

SFF-8431, PRBS 29 − 1, 10.3125 Gbps

7.37

ps

Data Dependent Pulse

Width Shrinkage

DDPWS

SFF-8431, PRBS 29 − 1, 10.3125 Gbps

4.58

ps

Uncorrelated Jitter

UJ

SFF-8431, 64B/66B, 10.3125 Gbps

0.14

ps

RECEIVER JITTERS

Total Jitter Tolerance

TJT

SFF-8431, 10.3125 Gbps

82.4

ps

99% Jitter

J2

SFF-8431, 10.3125 Gbps

55.5

ps

Data Dependent Pulse

Width Shrinkage

DDPWS

SFF-8431, 10.3125 Gbps

33.7

ps

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