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TPS72025QDRVRQ1 Datasheet(PDF) 11 Page - Texas Instruments |
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TPS72025QDRVRQ1 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 25 page Thermal Shutdown Current Limit UVLO Band Gap IN EN OUT BIAS 11 TPS720-Q1 www.ti.com SBVS278 – FEBRUARY 2016 Product Folder Links: TPS720-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7 Detailed Description 7.1 Overview The TPS720-Q1 family of LDO regulators uses innovative circuitry to achieve ultra-wide bandwidth and high loop gain, resulting in extremely high PSRR (up to 1 MHz) at very low headroom (VIN – VOUT). The implementation of the BIAS pin on the TPS720-Q1 vastly improves efficiency of low VOUT applications by allowing the use of a pre- regulated, low-voltage input supply. The TPS720-Q1 supports a novel feature where the output of the LDO regulates under light loads (< 500 μA) when the IN pin is left floating. The light-load drive current is sourced from VBIAS under this condition. This feature is particularly useful in power-saving applications where the dc-dc converter connected to the IN pin is disabled but the LDO is still required to regulate the voltage to a light load. These features, combined with low noise, low ground pin current, and ultra-small packaging, make this device ideal for portable applications. This family of regulators offers sub-band-gap output voltages, current limit, and thermal protection, and is fully specified from –40°C to +125°C. 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Internal Current Limit The TPS720-Q1 internal current limits help protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output voltage is not regulated, and is VOUT = ILIMIT × RLOAD. The NMOS pass transistor dissipates (VIN – VOUT) × IOUT until thermal shut down is triggered and the device is turned off. When the device cools down, the internal thermal shutdown circuit turns the device back on. If the fault condition continues, the device cycles between current limit and thermal shutdown; see the Thermal Considerations section for more details. The NMOS pass element in the TPS720-Q1 has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited so if extended reverse voltage operation is anticipated, external limiting to 5% of rated output current is recommended. 7.3.2 Inrush Current Limit The TPS720-Q1 family of LDO regulators implements a novel inrush current limit circuit architecture: the current drawn through the IN pin is limited to a finite value. This IINRUSHLIMIT charges the output to its final voltage. All current drawn through VIN charges the output capacitance when the load is disconnected. Equation 1 shows the inrush current limit performed by the circuit. IINRUSHLIMIT(A) = COUT(μF) × 0.0454545 (V/μs) + ILOAD(A) (1) |
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