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TPS61169 Datasheet(PDF) 9 Page - Texas Instruments |
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TPS61169 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 24 page FB V Duty 204 mV u FB LED SET V I R 9 TPS61169 www.ti.com SNVSA40A – OCTOBER 2014 – REVISED MARCH 2016 Product Folder Links: TPS61169 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated Feature Description (continued) 8.3.3 Shutdown The TPS61169 enters shutdown mode when the CTRL voltage is logic low for more than 2.5 ms. During shutdown, the input supply current for the device is less than 2 μA (max). Although the internal switch FET does not switch in shutdown, there is still a DC current path between the input and the LEDs through the inductor and Schottky diode. The minimum forward voltage of the LED array must exceed the maximum input voltage to ensure that the LEDs remain off in shutdown. 8.3.4 Current Program The FB voltage is regulated by a low 204-mV reference voltage. The LED current is programmed externally using a current-sense resistor in series with the LED string(s). The value of the RSET is calculated using: where • ILED = total output current of LED string(s) • VFB = regulated voltage of FB pin • RSET = current sense resistor (1) The output current tolerance depends on the FB accuracy and the current sensor resistor accuracy. 8.3.5 LED Brightness Dimming The TPS61169 receives PWM dimming signal at CTRL pin to control the total output current. When the CTRL pin is constantly high, the FB voltage is regulated to 204 mV typically. When the duty cycle of the input PWM signal is low, the regulation voltage at FB pin is reduced, and the total output current is reduced; therefore, it achieves LED brightness dimming. The relationship between the duty cycle and FB regulation voltage is given by: where • Duty = Duty cycle of the PWM signal • 204 mV = internal reference voltage (2) Thus, the user can easily control the WLED brightness by controlling the duty cycle of the PWM signal. As shown in Figure 3, the IC chops up the internal 204-mV reference voltage at the duty cycle of the PWM signal. The pulse signal is then filtered by an internal low-pass filter. The output of the filter is connected to the GM amplifier as the reference voltage for the FB pin regulation. Therefore, although a PWM signal is used for brightness dimming, only the WLED DC current is modulated, which is often referred as analog dimming. This eliminates the audible noise which often occurs when the LED current is pulsed in replica of the frequency and duty cycle of PWM control. Unlike other methods which filter the PWM signal for analog dimming, TPS61169 regulation voltage is independent of the PWM logic voltage level which often has large variations. For optimum performance, use the PWM dimming frequency in the range of 5 kHz to 100 kHz. If the PWM frequency is lower than 5 kHz, it is out of the low pass filter's filter range, the FB regulation voltage ripple becomes large, causing large output ripple and may generate audible noise. |
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