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TPS22930

SLVSBL3B – NOVEMBER 2012 – REVISED FEBRUARY 2016

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(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500-V HBM is possible with the necessary precautions.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions.

7.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-

±1000

(1)

Refer to Application Information section.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Input voltage range

1.4

5.5

V

ON voltage range

0

5.5

V

Output voltage range

0

V

High-level input voltage, ON

1.1

5.5

V

1.1

5.5

Low-level input voltage, ON

0

0.6

V

0

0.4

Input capacitor

µF

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

7.4 Thermal Information

TPS22930

UNIT

YZV (DSBGA)

4 PINS

Junction-to-ambient thermal resistance

189.1

°C/W

Junction-to-case (top) thermal resistance

1.9

°C/W

Junction-to-board thermal resistance

36.8

°C/W

Junction-to-top characterization parameter

11.3

°C/W

Junction-to-board characterization parameter

36.8

°C/W

Junction-to-case (bottom) thermal resistance

–

°C/W