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TPS65218B101PHPT Datasheet(PDF) 2 Page - Texas Instruments |
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TPS65218B101PHPT Datasheet(HTML) 2 Page - Texas Instruments |
2 / 87 page 2 TPS65218 SLDS206B – NOVEMBER 2014 – REVISED FEBRUARY 2016 www.ti.com Product Folder Links: TPS65218 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated Table of Contents 1 Features .................................................................. 1 2 Applications ........................................................... 1 3 Description ............................................................. 1 4 Revision History..................................................... 2 5 Pin Configuration and Functions ......................... 3 6 Specifications......................................................... 5 6.1 Absolute Maximum Ratings ...................................... 5 6.2 ESD Ratings.............................................................. 5 6.3 Recommended Operating Conditions ....................... 6 6.4 Thermal Information .................................................. 6 6.5 Electrical Characteristics........................................... 7 6.6 Timing Requirements .............................................. 15 6.7 Typical Characteristics ............................................ 16 7 Detailed Description ............................................ 17 7.1 Overview ................................................................. 17 7.2 Functional Block Diagram ....................................... 18 7.3 Feature Description................................................. 19 7.4 Device Functional Modes........................................ 41 7.5 Register Maps ......................................................... 43 8 Application and Implementation ........................ 72 8.1 Application Information............................................ 72 8.2 Typical Application .................................................. 72 9 Power Supply Recommendations ...................... 75 10 Layout................................................................... 76 10.1 Layout Guidelines ................................................. 76 10.2 Layout Example .................................................... 76 11 Device and Documentation Support ................. 77 11.1 Device Support...................................................... 77 11.2 Community Resources.......................................... 77 11.3 Trademarks ........................................................... 77 11.4 Electrostatic Discharge Caution ............................ 77 11.5 Glossary ................................................................ 77 12 Mechanical, Packaging, and Orderable Information ........................................................... 77 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (September 2015) to Revision B Page • Updated description for PGOOD to clarify that the output can be configured as open drain ............................................... 3 • Added VIN_LS3 conditions to ILIMIT for Load Switch 3 and updated the values ..................................................................... 13 Changes from Original (November 2014) to Revision A Page • Added part number TPS65218B101 ..................................................................................................................................... 1 • Increased VIN range for low voltage load switch with 350-mA current limit ......................................................................... 1 • Moved Tstg to the Absolute Maximum Ratings table and updated Handling Ratings table to an ESD Ratings table ............ 5 • Added device part number to Thermal Information table ....................................................................................................... 6 • Added test conditions and values for VUVLO hysteresis ......................................................................................................... 7 • Changed test conditions for input voltage ranges from "VIN_BIAS > 2.7 V" to "VIN_BIAS > VUVLO" ............................................ 7 • Updated values for DCDC1-4 VOUT falling and rising ............................................................................................................. 8 • Added more test conditions and values for VIN_DCDC4 ............................................................................................................ 9 • Updated VDCDC4 test conditions and values and added output voltage ripple specification for PFM mode .......................... 9 • Updated test conditions and added new values for VDCDC5, VDCDC6 DC accuracy .............................................................. 10 • Updated VIN_LS1 max value and added additional test condition for RDS(ON) ........................................................................ 12 • Added note for tHIGH ............................................................................................................................................................. 15 • Updated I 2C Bus Operation and added a note .................................................................................................................... 39 • Added note to Application and Implementation ................................................................................................................... 72 • Added Community Resources ............................................................................................................................................. 77 |
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