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TPS2560DRCT Datasheet(PDF) 6 Page - Texas Instruments |
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TPS2560DRCT Datasheet(HTML) 6 Page - Texas Instruments |
6 / 29 page V 5V/div OUT1 V EN1_bar 5V/div t-Time-2ms/div I 2 A/div IN V 5V/div OUT2 V =V EN1_bar EN2_bar V 5V/div OUT1 V EN1_bar 5V/div t-Time-2ms/div I 2 A/div IN V 5V/div OUT2 V =V EN1_bar EN2_bar 6 TPS2560, TPS2561 SLVS930B – DECEMBER 2009 – REVISED DECEMBER 2015 www.ti.com Product Folder Links: TPS2560 TPS2561 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Electrical Characteristics (continued) over recommended operating conditions, V/ENx = 0 V, or VENx = VIN (unless otherwise noted) PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT SUPPLY CURRENT IIN_off Supply current, low-level output VIN = 6.5 V, no load on OUTx, VENx = 6.5 V or VENx = 0 V 0.1 2.0 μA IIN_on Supply current, high-level output VIN = 6.5 V, no load on OUT RILIM = 20 kΩ 100 125 μA RILIM = 100 kΩ 85 110 μA IREV Reverse leakage current VOUTx = 6.5 V, VIN = 0 V TJ = 25°C 0.01 1.0 μA UNDERVOLTAGE LOCKOUT UVLO Low-level input voltage, IN VIN rising 2.35 2.45 V Hysteresis, IN TJ = 25°C 35 mV FAULTx FLAG VOL Output low voltage, FAULTx IFAULTx = 1 mA 180 mV Off-state leakage VFAULTx = 6.5 V 1 μA FAULTx deglitch FAULTx assertion or de-assertion due to overcurrent condition 6 9 13 ms THERMAL SHUTDOWN OTSD2 Thermal shutdown threshold 155 °C OTSD Thermal shutdown threshold in current-limit 135 °C Hysteresis 20(2) °C (1) Mounting per the PowerPADTM Thermally Enhanced Package application report (SLMA002) (2) The JEDEC high-K (2s2p) board used to derive this data was a 3in × 3in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. 7.7 Dissipation Ratings BOARD PACKAGE THERMAL RESISTANCE(1) RθJA THERMAL RESISTANCE RθJC TA ≤ 25°C POWER RATING High-K(2) DRC 41.6 °C/W 10.7 °C/W 2403 mW 7.8 Typical Characteristics Figure 1. Turn-on Delay and Rise Time Figure 2. Turn-off Delay and Fall Time |
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