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TPS65735RSNT Datasheet(PDF) 9 Page - Texas Instruments

Part # TPS65735RSNT
Description  PMU for Active Shutter 3D Glasses
Download  39 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS65735RSNT Datasheet(HTML) 9 Page - Texas Instruments

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TPS65735
www.ti.com
SLVSAI6A – JUNE 2011 – REVISED JANUARY 2016
Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
3.7 V
≤ VVIN ≤ 6.5 V
Line regulation
–1%
1%
ILOAD(LDO) = –10 mA
VVIN = 3.5 V
Load regulation
–2%
2%
0.1 mA
≤ ILOAD(LDO) ≤ –10 mA
at 20 KHz, ILOAD(LDO) = 10 mA
PSRR
Power supply rejection ratio
VDO(LDO) = 0.5 V
45
dB
CVLDO = 10 µF
BOOST CONVERTER
IQ(BST)
Boost Enabled, BST_EN = High
Boost operating quiescent
IOUT(BST) = 0 mA
2
4.5
µA
current
(boost is not switching)
VBAT = 3.6 V
Boost MOSFET switch on-
VIN(BST) = 2.5 V
RDSON(BST)
0.8
1.2
Ω
resistance
ISW(MAIN) = 200 mA
BST_EN signal = LOW (Boost
Leakage into BST_SW pin
disabled)
ILKG(BST_SW)
(includes leakage into analog
90
nA
VBST_SW = 4.2 V
h-bridge switches)
No load on BST_OUT pin
ISWLIM(BST)
Boost MOSFET switch current
100
150
200
mA
limit
Voltage across integrated
BST_EN signal = HIGH
VDIODE(BST)
boost diode during normal
VBST_SW = 16.0 V
1.0
V
operation
IBST_OUT = –2 mA
VREF(BST)
Boost reference voltage on
1.17
1.2
1.23
V
BST_FB pin
VREFHYS(BST)
Boost reference voltage
2%
2.5%
3.2%
hysteresis on BST_FB pin
TON(BST)
Maximum on time detection
5
6.5
8
µs
threshold
TOFF(BST)
Minimum off time detection
1.4
1.75
2.1
µs
threshold
TSHUT(BST)
Boost thermal shutdown
105
°C
threshold
TSHUT-HYS(BST)
Boost thermal shutdown
20
°C
threshold hysteresis
FULL H-BRIDGE ANALOG SWITCHES
IQ(HSW)
Operating quiescent current
5
µA
for h-bridge switches
RDSON(HSW)
H-bridge switches on
20
40
Ω
resistance
H-bridge switch propagation
TDELAY(HSW-H)
delay, input switched from low
VHBxy = 0 V → VVLDO
100
ns
to high state.
TDELAY(HSW-L)
H-bridge switch propagation
delay, input switched from
VHBxy = VVLDO → 0 V
100
ns
high to low state.
POWER MANAGEMENT CORE CONTROLLER
Low logic level for logic
IO logic level decreasing:
signals on power management VSYS → 0 V
VIL(PMIC)
core
IIN = 1 mA
0.4
V
(BST_EN, CHG_EN, SLEEP,
HBR1, HBR2, HBL1, HBL2)
High logic level for signals on
IO logic level increasing:
power management core
0 V
→ VSYS
VIH(PMIC)
1.2
V
(BST_EN, CHG_EN, SLEEP,
IIN = 1 mA
HBR1, HBR2, HBL1, HBL2)
Copyright © 2011–2016, Texas Instruments Incorporated
Specifications
9
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Product Folder Links: TPS65735


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