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SP704EN Datasheet(PDF) 4 Page - Sipex Corporation |
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SP704EN Datasheet(HTML) 4 Page - Sipex Corporation |
4 / 16 page SP703/704DS/07 SP703/704 Low Power Microprocessor Supervisory © Copyright 2000 Sipex Corporation 4 PIN ASSIGNMENTS Pin 1 —V OUT — Output Supply Voltage. VOUT connects to V CC when VCC is greater than V BATT and VCC is above the reset thresh- old. When V CC falls below VBATT and V CC is below the reset threshold, VOUT connects to V BATT. Connect a 0.1µF ca- pacitor from V OUT to GND. Pin 2 — V CC — +5V Supply Input Pin3 — GND — Ground reference for all signals Pin 4 — PFI — Power-Fail Input. This is the noninverting input to the power-fail com- parator. When PFI is less than 1.25V, PFO goes low. Connect PFI to GND or V OUT when not used. Pin 5 — PFO — Power-Fail Output. Pin 6 — MR — Manual Reset Input. This input generates a reset pulse when pulled below 0.8V. This active LOW input is TTL/ CMOS compatible and can be shorted to ground with a switch. It has an internal 250 µA (typical) pull-up current. Leave this pin floating when not used. Pin 7 — RESET (Active Low)– Reset Output. RESET Output goes low whenever V CC falls below the reset threshold or whenever MR is pulled below 0.8V for longer than 150nS. RESET remains low for 200ms after V CC crosses the reset threshold voltage on power-up or after being triggered by MR. Pin 8 — V BATT — Backup-Battery Input. When V CC falls below the reset threshold, VBATT will be switched to V OUT if VBATT is 20mV greater than V CC. When VCC rises 20mV above V BATT, VOUT will be recon- nected to V CC. The 40mV hysteresis pre- vents repeated switching if V CC falls slowly. PINOUT INTERNAL BLOCK DIAGRAM VOUT VCC GND PFI VBATT RESET MR PFO 1 2 3 4 5 6 7 8 1.25V 1.25V BATTERY SWITCHOVER CIRCUITRY PFI MR VCC VBATT RESET GENERATOR VOUT RESET PFO |
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