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SP7652EB Datasheet(PDF) 6 Page - Sipex Corporation |
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SP7652EB Datasheet(HTML) 6 Page - Sipex Corporation |
6 / 15 page 6 TYPE III LOOP COMPENSATION DESIGN The open loop gain of the SP7652EB can be divided into the gain of the error amplifier Gamp(s), PWM modulator Gpwm, buck converter output stage Gout(s), and feedback resistor divider Gfbk. In order to crossover at the selecting frequency fco, the gain of the error amplifier has to compensate for the attenuation caused by the rest of the loop at this frequency. The goal of loop compensation is to manipulate the open loop frequency response such that its gain crosses over 0dB at a slope of –20dB/dec. The open loop crossover frequency should be higher than the ESR zero of the output capacitors but less than 1/5 to 1/10 of the switching frequency fs to insure proper operation. Since the SP7652EB is designed with Ceramic Type output capacitors, a Type III compensation circuit is required to give a phase boost of 180 ° in order to counteract the effects of the output LC under damped resonance double pole frequency. Figure 12. Voltage Mode Control Loop with Loop Dynamic for Type III Compensation |
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