BQ24085_15 datasheet(8/40 Pages) TI1

Part #	BQ24085

Description	Single-Chip Li-Ion and Li-Pol Charge Management IC

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Manufacturer	TI1 [Texas Instruments]

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bq24085, bq24086, bq24087, bq24088

SLUS784E – DECEMBER 2007 – REVISED DECEMBER 2015

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7.6 Timing Requirements

over recommended operating range, TJ = 0 –125°C range, See the Application and Implementation section, typical values at

TJ = 25°C (unless otherwise noted), RTMR = 49.9 KΩ

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

POWER DOWN THRESHOLD – UNDERVOLTAGE LOCKOUT

V(IN) = 0 V → 5 V in 1 μs to

tDGL(PG)

Deglitch time on power good

2

ms

PG:HI

→ LO

INPUT POWER DETECTION(1)

Delay time, input power not detected

tDGL(NOIN)

PG: LO

→HI after tDGL(NOIN)

10

μs

status(2)

Charger turned off after tDLY(CHGOFF), Measured

tDLY(CHGOFF)

Charger off delay

25

ms

from PG: LO

→ HI; Timer reset after tDLY(CHGOFF)

INPUT OVERVOLTAGE PROTECTION

CE = HI or LO, Measured from V(IN) > V(OVP) to

tDGL(OVDET)

Input overvoltage detection delay

100

μs

PG: LO

→ HI; VIN increasing

CE = HI or LO, Measured from V(IN) < V(OVP)

tDGL(OVNDET)

Input overvoltage not detected delay(2)

100

μs

to PG: HI

→ LO; V(IN) decreasing

VOLTAGE AND CURRENT REGULATION TIMING(3)

Input power detection to full charge

Measured from PG:HI

→ LO to I(OUT) > 100 mA,

tPWRUP(CHG)

25

ms

current time delay

CE = LO, IO(OUT) = 750 mA, V(BAT) = 3.5 V

Measured from CE:HI

→ LO to I(OUT) >100 mA,

Charge enable to full charge current

tPWRUP(EN)

IO(OUT) = 750 mA, V(BAT)= 3.5 V, V(IN) = 4.5 V,

25

ms

delay

Input power detected

Measured from PG:HI

→ LO to V(OUT) > 90% of

Input power detection to voltage

charge voltage regulation;

tPWRUP(LDO)

regulation delay, LDO mode set, no

25

ms

V(TMR) = OPEN, LDO mode set, no battery and

battery or load connected

no load at OUT pin, CE = LO

CHARGE TERMINATION DETECTION(4)

tDGL(TERM)

Deglitch time, termination detected

V(ISET) decreasing

50

ms

BATTERY RECHARGE THRESHOLD

tDGL(RCH)

Deglitch time, recharge detection

V(BAT) decreasing

350

ms

TIMERS(5)

t(CHG)

Charge safety timer range

t(CHG) = K(CHG) × RTMR ; thermal loop not active

3

10

hours

K(CHG)

Charge safety timer constant

V(BAT) > V(LOWV)

0.08

0.1

0.12

hr/k

Ω

t(PCHG) = K(PCHG) × t(CHG) ; Thermal regulation

t(PCHG)

Pre-charge safety timer range

1080

3600

s

loop not active

K(PCHG)

Pre-charge safety timer constant

V(BAT) < V(LOWV)

0.08

0.1

0.12

BATTERY DETECTION THRESHOLDS

2 V < V(BAT) < VO(REG), Thermal regulation loop

t(DETECT)

Battery detection time

125

ms

not active; RTMR = 50 kΩ, IDET(down) or IDET (UP)

(1)

CE = HI or LOW, V(IN) > 3.5 V

(2)

Specified by design, not production tested.

(3)

V(IN) > V(OUT) + V(DO-MAX), charger enabled, no fault conditions detected, RTMR = 50 K or V(TMR) = OPEN; thermal regulation loop not

active.

(4)

VO(REG) = 4.2 V, charger enabled, no fault conditions detected, thermal regulation loop not active, RTMR = 50 K or TMR pin open.

(5)

CE = LO, charger enabled, no fault conditions detected, V(TMR) < 3 V, timers enabled.

7.7 Dissipation Ratings

(1)

PACKAGE

θJC (°C/W)

θJA (°C/W)

10-pin DRC

3.21

46.87

(1)

This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is

connected to the ground plane by a 2×3 via matrix.

8

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