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LM3485MM Datasheet(PDF) 3 Page - Texas Instruments |
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LM3485MM Datasheet(HTML) 3 Page - Texas Instruments |
3 / 28 page LM3485 www.ti.com SNVS178H – JANUARY 2002 – REVISED DECEMBER 2015 5 Pin Configuration and Functions DGK Package 8-Pin VSSOP Top View Pin Functions NO. NAME I/O DESCRIPTION 1 ISENSE I The current sense input pin. This pin should be connected to Drain node of the external PFET. 2 GND G Signal ground 3 NC — No connection The feedback input. Connect the FB to a resistor voltage divider between the output and GND for an 4 FB I adjustable output voltage. Current limit threshold adjustment. It connects to an internal 5.5-µA current source. A resistor is 5 ADJ I connected between this pin and the input Power Supply. The voltage across this resistor is compared with the VDS of the external PFET to determine if an over-current condition has occurred. 6 PWR GND G Power ground 7 PGATE O Gate Drive output for the external PFET. PGATE swings between VIN and VIN-5 V. 8 VIN P/I Power supply input pin Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM3485 |
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