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TPS22965NQWDSGTQ1 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS22965NQWDSGTQ1 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 33 page Thermal Pad 1 VIN 8 VOUT 2 VIN 7 VOUT 3 ON 6 CT 4 VBIAS 5 GND 3 TPS22965-Q1 www.ti.com SLVSCI3B – APRIL 2014 – REVISED DECEMBER 2015 Product Folder Links: TPS22965-Q1 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated 5 Device Comparison Table DEVICE RON AT 3.3 V (TYP) QUICK OUTPUT DISCHARGE PACKAGE WITH WETTABLE FLANKS MAXIMUM OUTPUT CURRENT TEMPERATURE RANGE TPS22965-Q1 16 m Ω Yes No 4 A –40°C to 105°C TPS22965N-Q1 16 m Ω No No 4 A –40°C to 105°C TPS22965W-Q1 16 m Ω Yes Yes 4 A –40°C to 125°C TPS22965NW-Q1 16 m Ω No Yes 4 A –40°C to 125°C 6 Pin Configuration and Functions DSG Package 8-Pin WSON With Exposed Thermal Pad Top View Pin Functions PIN I/O DESCRIPTION NO. NAME 1 VIN I Switch input. Input bypass capacitor recommended for minimizing VIN dip. Must be connected to Pin 1 and Pin 2. See the Application and Implementation section for more information. 2 3 ON I Active high switch control input. Do not leave floating. 4 VBIAS I Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5 V to 5.5 V. See the Application and Implementation section for more information. 5 GND — Device ground 6 CT O Switch slew rate control. Can be left floating. See the Application and Implementation section for more information. 7 VOUT O Switch output 8 — Thermal pad — Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See the Layout section for layout guidelines. |
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