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BQ27510DRZR-G3 Datasheet(PDF) 6 Page - Texas Instruments |
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BQ27510DRZR-G3 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 30 page  bq27510-G3 SLUSAT1A – MARCH 2013 – REVISED NOVEMBER 2015 www.ti.com 6.6 Data Flash Memory Characteristics TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tDR Data retention(1) 10 Years Flash programming write-cycles (1) 20,000 Cycles tWORDPROG) Word programming time(1) 2 ms ICCPROG) Flash-write supply current(1) 5 10 mA (1) Assured by design. Not production tested. 6.7 400-kHz I 2C-Compatible Interface Communication Timing Requirements TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tr SCL/SDA rise time 300 ns tf SCL/SDA fall time 300 ns tw(H) SCL pulse width (high) 600 ns tw(L) SCL pulse width (low) 1.3 μs tsu(STA) Setup for repeated start 600 ns td(STA) Start to first falling edge of SCL 600 ns tsu(DAT) Data setup time 100 ns th(DAT) Data hold time 0 ns tsu(STOP) Setup time for stop 600 ns tBUF Bus free time between stop and start 66 μs fSCL Clock frequency 400 kHz 6.8 100-kHz I 2C-Compatible Interface Communication Timing Requirements TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tr SCL/SDA rise time 1 µs tf SCL/SDA fall time 300 ns tw(H) SCL pulse width (high) 4 µs tw(L) SCL pulse width (low) 4.7 μs tsu(STA) Setup for repeated start 4.7 µs td(STA) Start to first falling edge of SCL 4 µs tsu(DAT) Data setup time 250 ns Receive mode 0 th(DAT) Data hold time ns Transmit mode 300 tsu(STOP) Setup time for stop 4 µs tBUF Bus free time between stop and start 4.7 μs fSCL Clock frequency 10 100 kHz tBUSERR Bus error timeout 17.3 21.2 s 6 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: bq27510-G3 |
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