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93L24FMQB Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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93L24FMQB Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 4 page  Switching Characteristics VCC ea50V TA ea25 C (See Section 1 for test waveforms and output load) Symbol Parameter CL e 15 pF Units Min Max tPLH Propagation Delay 32 ns tPHL E to AeB E to AkB AlB35 tPLH Propagation Delay 54 ns tPHL An to AlB Bn to AlB75 tPLH Propagation Delay 70 ns tPHL An to AkB Bn to AkB77 tPLH Propagation Delay 100 ns tPHL An or Bn to AeB 102 Functional Description The 93L24 5-bit comparators use combinational circuitry to directly generate ‘‘A greater than B’’ and ‘‘A less than B’’ outputs As evident from the logic diagram these ouptuts are generated in only three gate delays The ‘‘A equals B’’ output is generated in one additional gate delay by decoding the ‘‘A neither less than nor greater than B’’ condition with a NOR gate All three outputs are activated by the active LOW Enable Input (E) Tying the AlB output from one device into an A input on another device and the Ak B output into the corresponding B input permits easy expansion The A4 and B4 inputs are the most significant inputs and A0 B0 the least significant Thus if A4 is HIGH and B4 is LOW the AlB output will be HIGH regardless of all other inputs except E Logic Diagram TLF10199 – 3 3 |
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