1V/div

1V/div

Time(1ms/div)

C

=0 F

SS

m

C

=0.001 F

SS

m

C

=0.0047 F

SS

m

V

OUT

V

EN

0V

1.2V

TPS74201

GND

EN

FB

IN

PG

BIAS

SS

OUT

V

IN

V

OUT

R

1

R

2

R

3

C

OUT

Optional

C

IN

1µF

C

SS

V

BIAS

C

BIAS

1µF

Product

Folder

Sample &

Buy

Technical

Documents

Tools &

Software

Support &

Community

TPS74201

SBVS064M – DECEMBER 2005 – REVISED OCTOBER 2015

TPS742 1.5-A Ultra-LDO With Programmable Soft-Start

1 Features

3 Description

The TPS742 series of low-dropout (LDO) linear

1

•

Input Voltage Range: 0.8 V to 5.5 V

regulators provide an easy-to-use, robust power-

•

Soft-Start (SS) Pin Provides a Linear Start-Up

management

solution

for

a

wide

variety

of

With Ramp Time Set by External Capacitor

applications. User-programmable soft-start minimizes

•

1% Accuracy Over Line, Load, and Temperature

stress on the input power source by reducing

capacitive inrush current on start-up. The soft-start is

•

Supports Input Voltages as Low as 0.8 V With

monotonic

and

well

suited

for

powering

many

External Bias Supply

different types of processors and ASICs. The enable

•

Adjustable Output (0.8 V to 3.6 V)

input and power-good output allow easy sequencing

•

Ultra-Low Dropout: 55 mV at 1.5 A (Typical)

with external regulators. This complete flexibility

permits the user to configure a solution that meets

•

Stable With Any or No Output Capacitor

the sequencing requirements of FPGAs, DSPs, and

•

Excellent Transient Response

other applications with special start-up requirements.

•

Available in 5-mm × 5-mm × 1-mm VQFN and

A precision reference and error amplifier deliver 1%

DDPAK/TO-263-7 Packages

accuracy over load, line, temperature, and process.

•

Open-Drain Power-Good (5 × 5 VQFN)

Each LDO is stable with low-cost ceramic output

•

Active High Enable

capacitors, and the family is fully specified from

–40°C to 125°C. The TPS742 devices are offered in

a small (5 mm × 5 mm) VQFN package, yielding a

2 Applications

highly compact total solution size. For applications

•

FPGA Applications

that

require

additional

power

dissipation,

the

•

DSP Core and I/O Voltages

DDPAK/TO-263 (KTW) package is also available.

•

Servers

Device Information(1)

•

Post-Regulation Applications

PART

PACKAGE

BODY SIZE (NOM)

•

Applications With Special Start-Up Time or

NUMBER

Sequencing Requirements

VQFN (20)

5.00 mm × 5.00 mm

TPS74201

DDPAK/TO-263 (7)

8.89 mm × 10.10 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Typical Application Adjustable Output Version

Turnon Response

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.