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TPS23751PWPR Datasheet(PDF) 6 Page - Texas Instruments |
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TPS23751PWPR Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 52 page  TPS23751, TPS23752 SLVSB97D – JULY 2012 – REVISED JANUARY 2016 www.ti.com 6.6 Electric Characteristics - Controller Section Unless otherwise noted, 40 V ≤ VDD ≤ 57 V; VCTL = VMODE = VSLPb = VB; VSRT = 0.5 V; VAPD = VCS = VARTN = VRTN; CLS, GATE, LED, SRD, T2P open; RWAKE = 392 kΩ; RDEN = 24.9 kΩ; RT = 34 kΩ; CVB = CVC = 0.1 µF; –40 ≤ TJ ≤ 125°C. Typical values are at 25°C. All voltages referred to VSS. VC = 12 V, VDEN = VVSS, VARTN = VRTN = VSS PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VC (GATE DRIVE SUPPLY) Output voltage; TPS23752 only VVDD = 48 V, Sleep mode 12 12.8 13.8 V VVDD = 48 V, VC = 0 V 1.1 1.5 2.1 IVC_ST Startup source current mA VVDD = 10.9 V, VC = 8.6 V 0.9 1.3 1.8 IVC_OP Operating current VVC = 12 V, VCTL = VB 0.9 1.8 3.0 mA tST Bootstrap start up time, CVC = 22 µF VVDD = 48 V, measure time from VVC (0) → VCUV 103 155 203 ms VCUV VVC rising until VSRD ↓ 8.6 8.9 9.2 V UVLO threshold VCUVH Hysteresis 3 3.2 3.4 V VB (BIAS SUPPLY) Output voltage 7.5 V ≤ VVC ≤ 18 V, 0 ≤ IVB ≤ 5 mA 4.75 5.00 5.25 V APD (AUXILIARY POWER DETECT) VAPDEN VAPD ↑, measure with respect to ARTN 1.43 1.50 1.57 V APD threshold voltage VAPDH Hysteresis 0.28 0.30 0.32 V Leakage current VAPD = 18 V 10 µA RT (OSCILLATOR) FSW Switching frequency in PWM mode RT = 34.0 kΩ. Measure at GATE 226 251 276 kHz FVFO Switching frequency in VFO mode VCTL = 1.75 V, RT = 34.0 kΩ. Measure at GATE 105 135 165 kHz DMAX Maximum duty cycle VCTL = VB, Measure at GATE 75% 80% 85% CTL (CONTROL – PWM INPUT) VCTL ↓ until VSRD↑ 1.90 2.00 2.10 V VSRT = 0.5 V Hysteresis (1) 35 mV VCTL_VFO VCTL at PWM/VFO transition point VCTL ↓ until VSRD↑ 2.15 2.25 2.35 V VSRT = 1.0 V Hysteresis (1) 40.50 mV TSSD Internal soft start delay time VCTL = 3.5 V, measure from switching start to VCSMAX 1.87 3.01 5.09 ms Input resistance 70 105 145 k Ω VZF Zero frequency threshold (ZF) VCTL ↓ until GATE stops switching 1.40 1.50 1.60 V VZDC Zero duty cycle (ZDC) threshold (VFO disabled) VSRT = VARTN, VCTL ↓ until GATE stops switching 1.55 1.75 1.95 V Gain, VCS to VCTL (1) 5.0 V/V CS (CURRENT SENSE) VCSMAX Maximum threshold voltage VCS↑ until VGATE ↓ 0.22 0.25 0.28 V 1.60 V ≤ VCTL ≤ 1.90 V, VSRT = 0.5 V, VCS ↑ until 40 50 60 mV VGATE↓ VCS_VFO Peak VCS in VFO mode 1.85 V ≤ VCTL ≤ 2.15 V, VSRT = 1.0 V, VCS↑ until VGATE 85 100 115 mV ↓ VPK Internal slope compensation voltage, see Figure 1 D = DMAX 32 40 50 mV ICS_RAMP Ramp component of ICS D = DMAX 12 16 25 µA ICSDC DC component of ICS 1 2 3 µA Slope compensation ramp start relative to switching DSLOPE_ST 30% 34% 39% period. Refer to Figure 1 t1 Turn off delay VCS = 0.3 V, measure tprf50–50, see Figure 2 50 90 ns tBLNK Blanking period 100 150 200 ns Off state pulldown resistance 290 500 Ω (1) Parameters provided for reference only, and do not constitute part of TI published specifications for purposes of TI product warranty. 6 Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated Product Folder Links: TPS23751 TPS23752 |
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