1

CHG

2

DSG

PACK

3

BAT

4

VC1

PCHG

VCC

5

VC2

6

VC3

FUSE

7

VC4

8

VSS

TEST

REG33

9

10

TS1

30

VSS

28

11

SRP

12

27

REG25

26

RBI

13

SRN

14

25

NC

24

NC

15

TS2

23

22

21

20

29

NC

NC

NC

19

18

17

16

PRES

¯¯¯¯¯

NC

SMBD

SMBC

bq3055

www.ti.com

SLUSA91C – OCTOBER 2010 – REVISED OCTOBER 2015

5 Pin Configuration and Functions

DBT Package

30-Pin TSSOP

Top View

Pin Functions

PIN

DESCRIPTION

NAME

NO.

BAT

2

P

Alternate power source

CHG

1

O

Charge N-FET gate drive

DSG

30

O

Discharge N-FET gate drive

FUSE

26

O

Fuse drive

NC

14

—

Not internally connected. Connect to VSS.

NC

16

—

Not internally connected. Connect to VSS.

NC

17

—

Not internally connected. Connect to VSS.

NC

18

—

Not internally connected. Connect to VSS.

NC

19

—

Not internally connected. Connect to VSS.

NC

20

—

Not internally connected. Connect to VSS.

PACK

29

P

Alternate power source

PCHG

28

I/OD

Precharge P-FET gate drive

PRES

12

I

Host system present input

RBI

21

P

RAM backup

REG25

22

P

2.5-V regulator output

REG33

24

P

3.3-V regulator output

SMBC

15

I/OD

SMBus v1.1 clock line

SMBD

13

I/OD

SMBus v1.1 data line

SRN

10

AI

Differential Coulomb Counter input

SRP

9

AI

Differential Coulomb Counter input

TEST

25

—

Test pin, connect to VSS through 2-k

Ω resistor.

TS1

8

AI

Temperature sensor 1 thermistor input

TS2

11

AI

Temperature sensor 2 thermistor input

(1)

P = Power Connection, O = Digital Output, AI = Analog Input, I = Digital Input, I/OD = Digital Input/Output

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