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TPS650001RTET Datasheet(PDF) 8 Page - Texas Instruments |
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TPS650001RTET Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 40 page  TPS65000, TPS65001, TPS650001 TPS650003, TPS650006, TPS650061 SLVS810C – JUNE 2009 – REVISED SEPTEMBER 2015 www.ti.com Electrical Characteristics (continued) Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply for condition VIN = EN_LDOx = EN_DCDC = 3.6 V. External components L = 2.2 μH, COUT = 10 μF, CIN = 4.7 μF, (see the Typical Application section). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LOW DROP OUT REGULATORS (continued) IO = 1 mA to 300 mA, VINLDOx = 2.3 V – 6 V, –3.5% 3.5% VLDOx = 1.2 V Output Voltage Accuracy (7) IO = 1mA to 175 mA VINLDOx = 1.6 V – 6 V, –3.5% 3.5% VLDOx = 1.2 V IO = 1mA to 300 mA VINLDOx = 3.6 V Load regulation –1.5% 1.5% VLDOx = 1.2 V VINLDOx = 1.6 V – 6 V VLDOx = 1.2 V at Line regulation –0.5% 0.5% IO = 1 mA fNOISE ≤ 10 kHz, COUT ≥ 2.2 μF, VIN = 2.3 V, PSRR Power Supply Rejection Ratio 40 dB VOUT = 1.3 V IOUT = 10 mA Internal discharge resistance at RDIS EN_LDOx low 450 Ω VLDOx TSD Thermal shutdown Increasing temperature 150 °C Thermal shutdown hysteresis Decreasing temperature 30 °C SUPPLY VOLTAGE SUPERVISOR VIN Input voltage for RSTSNS pin 0 6 V t MRDEGLITCH MR Deglitch time 1 ms VIH Input high voltage MR pin only 1.2 6 V VIL Input low voltage MR pin only 0 0.4 V Ilkg High-input leakage current RST pin 0.01 0.1 μA VOL Output low voltage RST pin only, IO = –100 μA 0.4 V ITRST Reset timer capacitor current 1.6 2 2.2 μA Reset voltage trip voltage Voltage rising (Reset time begins) 0.58 0.6 0.63 V Reset voltage trip hysteresis Voltage falling (RST pulled low) –5% (7) Output voltage specification does not include tolerance of external programming resistors. 8.6 Switching Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STEP DOWN CONVERTER OUTPUT VOLTAGE EN_DCDC to start of switching 250 tStart Start-up time μs (10%) tRamp VDCDC ramp-up time VDCDC ramp from 10% to 90% 250 μs LOW DROP OUT REGULATORS tRAMP VLDOx Ramp Time VLDOx ramp from 10% to 90% 200 μs 8.7 Dissipation Ratings TA ≤ 25°C TA = 70°C TA = 85°C DEVICE PACKAGE RθJA RθJB POWER RATING POWER RATING POWER RATING TPS65000/01(1) 270°C/W 14°C/W 370 mW 204 mW 148 mW RTE/RUK TPS65000/01(2) 48.7°C/W 14°C/W 2.05 W 1.13 W 821 mW (1) The JEDEC low-K (1s) board used to derive this data was a 3 in × 3 in, two-layer board with 2-oz copper traces on top of the board. (2) The JEDEC high-K (2s2p) board used to derive this data was a 3 in × 3 in, multilayer board with 1-oz internal power and ground. 8 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: TPS65000 TPS65001 TPS650001 TPS650003 TPS650006 TPS650061 |
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