TPS65000-Q1

VINLDO1

EN_LDO1

VINLDO2

EN_LDO2

VLDO1

VLDO2

AGND

PGND

FB_LDO1

FB_LDO2

Band-Gap Reference

Oscillator

SSCG

3-mm × 3-mm QFN

VINDCDC

EN_DCDC

MODE

SW

FB_DCDC

PG

LDO2

300 mA

Buck Converter

600 mA

LDO1

300 mA

TPS65000-Q1

SLVSC45B – AUGUST 2013 – REVISED SEPTEMBER 2015

www.ti.com

7 Detailed Description

7.1 Overview

The TPS65000-Q1 device provides one step-down converter, two low dropout regulators, spread spectrum clock

generation, and a supply voltage supervisor for the TPS65001 only. The device has an input voltage range of

2.3 V to 6.0 V and is characterized across a –40°C to +85°C range. This device is intended for (but not limited to)

powering smart phones, embedded processors, and point-of-load devices.

The output voltage of the step-down converter can be selected through resistor networks on the output. To

maximize efficiency, there are two modes of operation based on load conditions: PWM or PFM. By pulling the

MODE pin high, forced PWM can be achieved. Pulling this pin low results in an automatic adjustment between

PFM and PWM modes.

The two general-purpose low-dropout regulators each have their own separate enables and voltage inputs. The

inputs can be tied to the output of the step-down converter or to a separate voltage source. Resistor networks

are required on the output of the regulator to set the output voltage. Their wide voltage range allows for handling

direct connections to a battery.

The switching frequency of the step-down converter is handled by the oscillator, with a typical frequency of

2.25 MHz. The spread spectrum clock (SSC) modulates this frequency when the device is in PWM mode. This

additional circuit in the oscillator block reduces power that may cause EMI.

The TPS65000-Q1 device also provide a power good signal to monitor the condition of the DC-DC and both

LDOs. The DC-DC and LDOs are only monitored if their enable signal is high. If all enabled resources are in

regulation, the pin is pulled low. If one or more of the enabled resources are out of regulation, the pin is pulled in

Hi-Z .

7.2 Functional Block Diagram

10

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