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IS25LQ020B Datasheet(PDF) 10 Page - Integrated Silicon Solution, Inc |
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IS25LQ020B Datasheet(HTML) 10 Page - Integrated Silicon Solution, Inc |
10 / 66 page IS25LQ025/512/010/020/040B Integrated Silicon Solution, Inc.- www.issi.com Rev.A 12/12/2014 10 5. SYSTEM CONFIGURATION The IS25LQ025/512/010/020/040B is designed to interface directly with the synchronous Serial Peripheral Interface (SPI) microcontrollers or any SPI interface-equipped system controllers. The memory array of IS25LQ025/512/010/020/040B is divided into uniform 4Kbyte sectors or uniform 32/64Kbyte blocks (a block consists of eight/sixteen adjacent sectors respectively). Table 5.1 and Table 5.2 illustrate the memory map of the device. The Status Register controls how the memory is protected. 5.1 BLOCK/SECTOR ADDRESSES Table 5.1 Block/Sector Addresses of IS25LQ025/512/010B Memory Density Block No. (64Kbyte) Block No. (32Kbyte) Sector No. Sector Size (Kbyte) Address Range Block 0 Block 0 Sector 0 4 000000h - 000FFFh Sector 1 4 001000h - 001FFFh : : : Sector 7 4 007000h - 007FFFh Block 1 Sector 8 4 008000h - 008FFFh Sector 9 4 009000h - 009FFFh : : : Sector 15 4 00F000h - 00FFFFh Block 1 Block 2 Sector 16 4 010000h - 010FFFh Sector 17 4 011000h - 011FFFh : : : Sector 23 4 017000h - 017FFFh Block 3 Sector 24 4 018000h - 018FFFh Sector 25 4 019000h - 019FFFh : : : Sector 31 4 01F000h – 01FFFFh |
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