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ADC1225CCD-1 Datasheet(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # ADC1225CCD-1
Description  12-Bit Plus Sign mP Compatible A/D Converters
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

ADC1225CCD-1 Datasheet(HTML) 4 Page - National Semiconductor (TI)

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Electrical Characteristics (Continued)
The following specifications apply for DVCC e AVCC e 5V VREF e 5V fCLK e 10 MHz Vb eb5V for bipolar input range or
Vb e GND for unipolar input range unless otherwise specified Bipolar input range is defined as b505V s VIN(a) s 505V
b
505V s VIN(b) s 505V and
lVIN(a) b VIN(b)l s 505V Unipolar input range is defined as b005V s VIN(a) s 505V
b
005V s VIN(b) s 505V and
lVIN(a) b VIN(b)l s 505V Boldface limits apply from TMIN to TMAX all other limits TA e TJ
e
25 C (Notes 3 4 5 6 7)
Parameter
Conditions
ADC1205CCJ ADC1225CCD
ADC1205CCJ-1 ADC1225CCD-1
Units
Limit
Typ
Tested
Design
Typ
Tested
Design
(Note 8)
Limit
Limit
(Note 8)
Limit
Limit
(Note 9) (Note 10)
(Note 9)
(Note 10)
DIGITAL AND DC CHARACTERISTICS
(Continued)
VOUT(1) Logical ‘‘1’’ Output
VCCe475V
Voltage (Min)
IOUTeb360 mA
24
24
24
V
IOUTeb10 mA
45
45
45
V
VOUT(0) Logical ‘‘0’’ Output
VCCe475V
04
04
04
V
Voltage (Max)
IOUTe16 mA
IOUT TRI-STATE Output Leakage VOUTe0V
b
001
b
3
b
001
b
03
b
3
m
A
Current (Max)
VOUTe5V
001
3
001
03
3
m
A
ISOURCE Output Source Current
VOUTe0V
b
12
b
60
b
12
b
70
b
60
mA
(Min)
ISINK Output Sink Current (Min)
VOUTe5V
16
80
16
90
80
mA
DICC DVCC Supply Current (Max) fCLKe1 MHz CSe11
3
1
25
3
mA
AICC AVCC Supply Current (Max) fCLKe1 MHz CSe11
3
1
25
3
mA
Ib Vb Supply Current (Max)
fCLKe1 MHz CSe110
100
10
100
100
m
A
AC Electrical Characteristics
The following specifications apply for DVCCeAVCCe50V tretfe20 ns and TAe25 C unless otherwise specified
Typ
Tested
Design
Limit
Parameter
Conditions
(Note 8)
Limit
Limit
Units
(Note 9)
(Note 10)
fCLK Clock Frequency
MIN
10
03
MHz
MAX
10
15
MHz
Clock Duty Cycle
MIN
40
%
MAX
60
%
TC Conversion Time
MIN
108
1fCLK
MAX
109
1fCLK
MIN
fCLKe10 MHz
108
m
s
MAX
fCLKe10 MHz
109
m
s
tW(WR)L WR Pulse Width
MAX
220
350
ns
tACC Access Time (Delay from
CLe100 pF
210
340
ns
Falling Edge of RD to
Output Data Valid) (Max)
t1H t0H TRI-STATE Control (Delay
RLe2k CLe100 pF
170
290
ns
from Rising Edge of RD to
Hi-Z State) (Max)
tPD(READYOUT) RD or WR to
250
400
ns
READYOUT Delay (Max)
tPD(INT) RD or WR to Reset of INT
250
400
ns
(Max)
Note 1
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur DC and AC electrical specifications do not apply when operating
the device beyond its specified operating ratings
Note 2
All voltages are measured with respect to ground unless otherwise specified
Note 3
A parasitic zener diode exists internally from AVCC and DVCC to ground This parasitic zener has a typical breakdown voltage of 7 VDC
4


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