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IS66WV1M16EBLL Datasheet(PDF) 7 Page - Integrated Silicon Solution, Inc |
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IS66WV1M16EBLL Datasheet(HTML) 7 Page - Integrated Silicon Solution, Inc |
7 / 15 page 7 IS66WV1M16EALL IS66/67WV1M16EBLL Rev. 0A | October 2014 www.issi.com - SRAM@issi.com READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter -55 -70 Unit Notes Min Max Min Max tRC Read cycle time 55 - 70 - ns tAA Address Acess Time - 55 - 70 ns 1 tOHA Output Hold Time 10 - 10 - ns tACS1/ACS2 CS1#/CS2 Acess Time - 55 - 70 ns tDOE OE# Access Time - 25 - 35 ns 1 tHZOE OE# to High-Z output - 20 - 25 ns 2 tLZOE OE# to Low-Z output 5 - 5 - ns 2 tCSM Maximum CS1#/CS2 pulse width - 15 - 15 us tHZCS1/HZCS2 CS1#/CS2 to High-Z output 0 20 0 25 ns 2 tLZCS1/HZCS2 CS1#/CS2 to Low-Z output 10 - 10 - ns 2 tBA UB#/LB# Acess Time - 55 - 70 ns 1 tHZB UB#/LB# to High-Z output 0 20 0 25 ns 2 tLZB UB#/LB# to Low-Z output 0 - 0 - ns 2 tCPH CS1# HIGH (CS2 LOW) time 5 - 5 - ns AC WAVEFORMS READ CYCLE NO. 1(1) (Address Controlled, OE#= VIL, WE#=VIH, UB# or LB# = VIL) CS1# CS2 tRC Address DQ 0-15 tOHA tOHA tAA PREVIOUS DATA VALID DATA VALID tCSM Notes: 1. WE# is HIGH for a Read Cycle. Notes: 1. Test conditions and output loading are specified in the AC Test Conditions and AC Test Loads (Figure 1) on page 5. 2. Tested with the load in Figure 2. Transition is measured ±100 mV from steady-state voltage. Not 100% tested. |
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