7

IS66WV1M16EALL

IS66/67WV1M16EBLL

Rev. 0A | October 2014

www.issi.com - SRAM@issi.com

Symbol

Parameter

-55

-70

Unit

Notes

Min

Max

Min

Max

Read cycle time

55

-

70

-

ns

Address Acess Time

-

55

-

70

ns

1

Output Hold Time

10

-

10

-

ns

CS1#/CS2 Acess Time

-

55

-

70

ns

OE# Access Time

-

25

-

35

ns

1

OE# to High-Z output

-

20

-

25

ns

2

OE# to Low-Z output

5

-

5

-

ns

2

Maximum CS1#/CS2 pulse width

-

15

-

15

us

CS1#/CS2 to High-Z output

0

20

0

25

ns

2

CS1#/CS2 to Low-Z output

10

-

10

-

ns

2

UB#/LB# Acess Time

-

55

-

70

ns

1

UB#/LB# to High-Z output

0

20

0

25

ns

2

UB#/LB# to Low-Z output

0

-

0

-

ns

2

CS1# HIGH (CS2 LOW) time

5

-

5

-

ns

AC WAVEFORMS

CS1#

CS2

tRC

Address

DQ 0-15

tOHA

tOHA

tAA

PREVIOUS DATA VALID

DATA VALID

tCSM

Notes:

1.

WE# is HIGH for a Read Cycle.

Notes:

1. Test conditions and output loading are specified in the AC Test Conditions and AC Test Loads (Figure 1) on page 5.

2. Tested with the load in Figure 2. Transition is measured ±100 mV from steady-state voltage. Not 100% tested.