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TAS5751MDCA Datasheet(PDF) 4 Page - Texas Instruments |
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TAS5751MDCA Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 70 page  4 TAS5751M SLASEC1A – MARCH 2016 – REVISED MARCH 2016 www.ti.com Product Folder Links: TAS5751M Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Pin Functions (continued) PIN TYPE(1) DESCRIPTION NAME NO. (2) Although these pins are not connected internally, optimum thermal performance is realized when these pins are connected to the ground plane. Doing so allows copper on the PCB to fill up to and including these pins, providing a path for heat to conduct away from the device and into the surrounding PCB area. MCLK 20 DI Master clock used for internal clock tree and sub-circuit/state machine clocking NC(2) 12 P Not connected inside the device (all "no connect" terminals should be connected to system ground) 13 30 36 37 OSC_GND 22 P Ground reference for oscillator circuitry (NOTE: These terminals should be connected to the system ground) OSC_RES 21 AO Connection point for precision resistor used by internal oscillator circuit. Details for this resistor are shown in the Typical Applications section PBTL 11 DI Places the power stage in BTL mode when pulled low, or in PBTL mode when pulled high PDN 24 DI Places the device in power down when pulled low PGND 4 — Ground reference for power device circuitry (NOTE: This terminal should be connected to the system ground) 5 44 45 PLL_FLTM 15 AO Negative connection point for the PLL loop filter components PLL_FLTP 16 AO Positive connection point for the PLL loop filter components PLL_GND 14 P Ground reference for PLL circuitry (NOTE: This terminal should be connected to the system ground) PVDD 7 P Power supply for internal power circuitry 8 41 42 RST 31 DI Places the devices in reset when pulled low SCL 29 DI I²C serial control port clock SCLK 26 DI Bit clock for the digital signal that is active on the input data line of the serial data port SDA 28 DI/DO I²C serial control port data SDIN 27 DI Data line to the serial data port SSTIMER 10 AO Connection point for the capacitor that is used by the ramp timing circuit, as described in the SSTIMER Pin Functionality section TEST 32 — Used by TI for testing during device production (NOTE: This terminal should be connected to system ground) PowerPAD — P Exposed metal pad on the underside of the device, which serves as an electrical connection point for ground as well as a heat conduction path from the device into the board (NOTE: This terminal should be connected to ground through a land pattern defined in the Mechanical Data section) |
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