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ADN2915ACPZ Datasheet(PDF) 2 Page - Analog Devices |
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ADN2915ACPZ Datasheet(HTML) 2 Page - Analog Devices |
2 / 36 page ADN2915 Data Sheet Rev. A | Page 2 of 36 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Jitter Specifications....................................................................... 5 Output and Timing Specifications............................................. 6 Timing Diagrams.......................................................................... 8 Absolute Maximum Ratings............................................................ 9 Thermal Characteristics .............................................................. 9 ESD Caution.................................................................................. 9 Pin Configuration and Function Descriptions........................... 10 Typical Performance Characteristics ........................................... 11 I2C Interface Timing and Internal Register Descriptions ......... 14 Register Map ............................................................................... 15 Theory of Operation ...................................................................... 20 Functional Description.................................................................. 22 Frequency Acquisition............................................................... 22 Limiting Amplifier ..................................................................... 22 Slice Adjust.................................................................................. 22 Edge Select................................................................................... 22 Loss of Signal (LOS) Detector .................................................. 23 Passive Equalizer ........................................................................ 24 Bypass........................................................................................... 24 Lock Detector Operation .......................................................... 25 Harmonic Detector .................................................................... 25 Output Disable and Squelch ..................................................... 26 I2C Interface ................................................................................ 26 Reference Clock (Optional) ...................................................... 26 Additional Features Available via the I2C Interface............... 28 Input Configurations ................................................................. 30 DC-Coupled Application .......................................................... 32 Outline Dimensions....................................................................... 33 Ordering Guide .......................................................................... 33 REVISION HISTORY 1/16—Rev. 0 to Rev. A Changed NC to DNC.................................................... Throughout Changes to Figure 5........................................................................ 10 Updated Outline Dimensions....................................................... 33 Changes to Ordering Guide .......................................................... 33 7/13—Revision 0: Initial Version |
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