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ADN2917ACPZ Datasheet(PDF) 6 Page - Analog Devices |
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ADN2917ACPZ Datasheet(HTML) 6 Page - Analog Devices |
6 / 32 page ADN2917 Data Sheet Rev. A | Page 6 of 32 Parameter Test Conditions/Comments Min Typ Max Unit I2C INTERFACE DC CHARACTERISTICS LVTTL Input High Voltage VIH 2.0 V Input Low Voltage VIL 0.8 V Input Current VIN = 0.1 × VDD or VIN = 0.9 × VDD −10.0 +10.0 µA Output Low Voltage VOL, IOL = 3.0 mA 0.4 V I2C INTERFACE TIMING See Figure 17 SCK Clock Frequency 400 kHz SCK Pulse Width High tHIGH 600 ns SCK Pulse Width Low tLOW 1300 ns Start Condition Hold Time tHD;STA 600 ns Start Condition Setup Time tSU;STA 600 ns Data Setup Time tSU;DAT 100 ns Data Hold Time tHD;DAT 300 ns SCK/SDA Rise/Fall Time2 tR/tF 20 + 0.1 Cb 300 ns Stop Condition Setup Time tSU;STO 600 ns Bus Free Time Between Stop and Start Conditions tBUF 1300 ns LVTTL DC INPUT CHARACTERISITICS (I2C_ADDR) Input Voltage High VIH 2.0 V Low VIL 0.8 V Input Current High IIH, VIN = 2.4 V +5 µA Low IIL, VIN = 0.4 V −5 µA LVTTL DC OUTPUT CHARACTERISITICS (LOS/LOL) Output Voltage High VOH, IOH = 2.0 mA 2.4 V Low VOL, IOL = −2.0 mA 0.4 V REFERENCE CLOCK CHARACTERISTICS Optional LTR mode Input Compliance Voltage (Single- Ended) VCM (no input offset, no input current), see Figure 25, ac-coupled input 0.55 1.0 V Minimum Input Drive See Figure 25, ac-coupled, differential input 100 mV p-p diff Reference Frequency 11.05 176.8 MHz Required Accuracy3 AC-coupled, differential input 100 ppm 1 Fibre Channel Physical Interface 4 standard, FC-PI-4, Rev 8.00, May 21, 2008. 2 Cb is the total capacitance of one bus line in picofarads (pF). If mixed with high speed (HS) mode devices, faster rise/fall times are allowed (refer to the Philips I2C Bus Specification, Version 2.1). 3 Required accuracy in dc-coupled mode is guaranteed by design as long as the clock common-mode voltage output matches the reference clock common-mode voltage range. |
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