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ADN2917ACPZ-RL7 Datasheet(PDF) 3 Page - Analog Devices |
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ADN2917ACPZ-RL7 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 32 page  Data Sheet ADN2917 Rev. A | Page 3 of 32 SPECIFICATIONS TA = TMIN to TMAX, VCC = VCCMIN to VCCMAX, VCC1 = VCC1MIN to VCC1MAX, VDD = VDDMIN to VDDMAX, VEE = 0 V, input data pattern: PRBS 223 − 1, ac-coupled, I2C register default settings, unless otherwise noted. Table 1. Parameter Test Conditions/Comments Min Typ Max Unit DATA RATE SUPPORT RANGE 8.5 11.3 Gbps INPUT—DC CHARACTERISTICS Peak-to-Peak Differential Input1 PIN – NIN 1.0 V Input Resistance Differential 95 100 105 Ω BYPASS PATH—CML INPUT Input Voltage Range At PIN or NIN, dc-coupled, RX_TERM_FLOAT = 1 (float) 0.5 VCC V Input Common-Mode Level DC-coupled (see Figure 32), 600 mV p-p differential, RX_TERM_FLOAT = 1 (float) 0.65 VCC − 0.15 V Differential Input Sensitivity OC-192 AC-coupled, RX_TERM_FLOAT = 0 (VCM = 1.2 V), bit error rate (BER) = 1 × 10−10 200 mV p-p 8GFC2 Jitter tolerance scrambled pattern (JTSPAT), ac-coupled, RX_TERM_FLOAT = 0 (VCM = 1.2 V), BER = 1 × 10−12 200 mV p-p LIMITING AMPLIFIER INPUT PATH Differential Input Sensitivity OC-192 BER = 1 × 10−10 9.2 mV p-p 8GFC2 JTSPAT, BER = 1 × 10−12 8.3 mV p-p 10.3125 Gbps JTSPAT, BER = 1 × 10−12 11.0 mV p-p EQUALIZER INPUT PATH Differential Input Sensitivity 15-inch FR-4, 100 Ω differential transmission line, adaptive EQ on 8GFC2 JTSPAT, BER = 1 × 10−12 115 mV p-p OC-192 BER = 1 × 10−10 184 mV p-p INPUT—AC CHARACTERISTICS S11 At 7.5 GHz, differential return loss, see Figure 9 −12 dB LOS DETECT Loss of Signal Detect 10 mV p-p Loss of signal minimum program value 5 mV p-p Loss of signal maximum program value 128 mV p-p Hysteresis (Electrical) 5.7 dB LOS Assert Time AC-coupled3 135 µs LOS Deassert Time AC-coupled3 110 µs LOSS OF LOCK (LOL) DETECT DCO Frequency Error for LOL Assert With respect to nominal, data collected in lock to reference (LTR) mode 1000 ppm DCO Frequency Error for LOL Deassert With respect to nominal, data collected in LTR mode 250 ppm LOL Assert Response Time 8.5 Gbps, JTSPAT 25 µs 10 Gbps 18 µs ACQUISITION TIME Lock to Data (LTD) Mode OC192 0.5 ms 11.3 Gbps 0.5 ms 8.5 Gbps, JTSPAT 0.5 ms Optional LTR Mode4 6.0 ms DATA RATE READBACK ACCURACY Coarse Readback ±5 % Fine Readback In addition to reference clock accuracy ±100 ppm |
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Similar Description - ADN2917ACPZ-RL7 |
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