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PEEL18CV8PI-15 Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers |
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PEEL18CV8PI-15 Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers |
4 / 10 page 4 04-02-004H International CMOS Technology ® PEELTM 18CV8 function as a dedicated input, a dedicated output, or a bi- directional I/O. Opening every connection on the output enable term will permanently enable the output buffer and yield a dedicated output. Conversely, if every connection is intact, the enable term will always be logically false and the I/O will function as a dedicated input. Input/Feedback Select The PEEL18CV8 macrocell also provides control over the feedback path. The input/feedback signal associated with each I/O macrocell may be obtained from three different locations; from the I/O input pin, from the Q output of the flip-flop (registered feedback), or directly from the OR gate (combinatorial feedback). Bi-directional I/O The input/feedback signal is taken from the I/O pin when using the pin as a dedicated input or as a bi-directional I/O. (Note that it is possible to create a registered output func- tion with a bi-directional I/O.) Combinatorial Feedback The signal-select multiplexer gives the macrocell the ability to feedback the output of the OR gate, bypassing the out- put buffer, regardless of whether the output function is reg- istered or combinatorial. This feature allows the creation of asynchronous latches, even when the output must be dis- abled. (Refer to configurations 5,6,7 and 8 in Figure 5.) Figure 4 Block Diagram of the PEEL18CV8 I/O Macrocell Registered Feedback Feedback also can be taken from the register, regardless of whether the output function is to be combinatorial or regis- tered. When implementing a combinatorial output function, registered feedback allows for the internal latching of states without giving up the use of the external output. Design Security The PEEL18CV8 provides a special EEPROM security bit that prevents unauthorized reading or copying of designs programmed into the device. The security bit is set by the PLD programmer, either at the conclusion of the program- ming cycle or as a separate step, after the device has been programmed. Once the security bit is set it is impossible to verify (read) or program the PEEL until the entire device has first been erased with the bulk-erase function. Programming Support ICT’s JEDEC file translator allows easy conversion of exist- ing 20 pin PLD designs to the PEEL18CV8, without the need for redesign. ICT supports a broad range of popular third party design entry systems, including Data I/O Synario and Abel, Logical Devices CUPL and others. ICT also offers (for free) its proprietary PLACE software, an easy-to- use entry level PC-based software development system. Programming support includes all the popular third party programmers; Data I/O, Logical Devices, and numerous others. ICT also provides a low cost development program- mer system, the PDS-3. |
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