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CLC021AVGZ-5.0 Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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CLC021AVGZ-5.0 Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 18 page AC Electrical Characteristics—CLC021AVGZ-3.3 (Continued) Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 3). Symbol Parameter Conditions Reference Min Typ Max Units L GEN Output Inductance (Note 4) SDO, SDO 6nH R GEN Output Resistance (Note 4) 25k Ω Note 1: “Absolute Maximum Ratings” are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of “Electrical Characteristics” specifies acceptable device operating conditions. Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to VSS =0V. Note 3: Typical values are stated for VDD = +5.0V (CLC021AVGZ-5.0) or +3.3V (CLC021AVGZ-3.3) and TA = +25˚C. Note 4: Specification is guaranteed by design. Note 5: RL =75Ω, AC-coupled @ 270 Mbps,RREF = 1.69 kΩ 1%, See Test Loads and Figure 2. Note 6: CLC021 mounted in the SD021EVK board, configured in BIST mode (NTSC colour bars) with PCLK = 27 MHz derived from Tektronix TG2000 black-burst reference. Timing jitter measured with Tektronix VM700T using jitter measurement FFT mode, frame rate, 1 kHz filter bandwidth, Hanning window. Note 7: Measured from rising-edge of first PCLK cycle until Lock Detect output goes high (true). Test Loads 10136803 FIGURE 1. Test Loads www.national.com 6 |
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