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CLC430A8B Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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CLC430A8B Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 8 page Vin -Vcc Vout Add R to improve DG and DP p Rp Rf Rg Rs Rin CLC430 + - Fig. 3 Improved DG and DP Video Amplifier Printed Circuit Layout To get the best amplifier performance careful placement of the amplifier, components and printed circuit traces must be observed. Place the 0.1 µFceramicdecouplingcapaci- tors less than 0.1" (3mm) from the power supply pins. Place the 6.8 µF tantalum capacitors less than 0.75" (20mm) from the power supply pins. Shorten traces between the inverting pin and components to less than 0.25" (6mm). Clear ground plane 0.1" (3mm) away from pads and traces that connect to the inverting, non- inverting and output pins. Do not place ground or power plane beneath the op-amp package. Comlinear provides literature and evaluation boards 730013 DIP or 730027 SOIC illustrating the recommended op-amp layout. Applications Circuits Level Shifting The circuit shown in Fig. 4 implements level shifting by AC coupling the input signal and summing a DC voltage. The resistor Rin and the capacitor C set the high-pass break frequency. The amplifier closed-loop bandwidth is fixed by the selection of Rf. The DC and AC gains for circuit of Fig. 4 are different. The AC gain is set by the ratio of Rf and Rg. And the DC gain is set by the parallel combination of Rg and R2. C Vin DC Vin AC Vout Rf Rg R2 Rin + - CLC430 Fig. 4 Level Shifting Circuit Multiplexing Multiple signal switching is easily handled with the disable function of the CLC430. Board trace capacitance at the output pin will affect the frequency response and switching transients. To lessen the effects of output capacitance place a resistor (Ro) within the feedback loop to isolate the outputs as shown in Fig. 5. To match the mux output impedance to a transmission line, add a resistor (Rs) in series with the output. Rf Rf Rs Ro Ro Rin Rin RL Rg Rg Vout Vin1 Vin2 DIS1 DIS2 CLC430 CLC430 Fig. 5 Output Connection Automatic Gain Control Current-feedback amplifiers can implement very fast automatic-gain control circuits. The circuit shown in Fig. 6 shows an AGC circuit using the CLC430, a half-wave rectifier, an integrator and a FET. The CLC430 current- feedback amplifier maintains constant bandwidth and linear phase over AGC's gain range. This circuit effectively controls the output level for continuous signals. Fig. 6 AGC Circuit The bandwidth of the CLC430 AGC is limited by R f , the feedback resistor. The FET gate voltage is limited to a range of: R of 750 Ω and C1 of 1.0µF gives a useful R ds range of approximately 150 to 2K ohms. Scaling the integrator gain or adding attenuation before the diode D accommodates large signal swings. Determine the overall gain by: The integrator sets the loop time constant. −< < − 25 1 .Vg 1 + + R RR f gds VV R R V R R out in f g in f ac DC =+ − 1 22 ||R http://www.national.com 6 |
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