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SMH4042S-AKM Datasheet(PDF) 6 Page - Summit Microelectronics, Inc. |
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SMH4042S-AKM Datasheet(HTML) 6 Page - Summit Microelectronics, Inc. |
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6 / 28 page  6 SMH4042 2037 8.0 8/8/00 2.7V to 4.5V 4.5V to 5.5V Symbol Parameter Conditions Min Max Min Max Units fSCL SCL Clock Frequency 0 100 0 400 KHz tLOW Clock Low Period 4.7 1.3 ms tHIGH Clock High Period 4.0 0.6 ms tBUF Bus Free Time Before New Transmission 4.7 1.3 ms tSU:STA Start Condition Setup Time 4.7 0.6 ms tHD:STA Start Condition Hold Time 4.0 0.6 ms tSU:STO Stop Condition Setup Time 4.7 0.6 ms tAA Clock Edge to Valid Output SCL low to Valid SDA (cycle n) 0.3 3.5 0.2 0.9 ms tDH Data Out Hold Time SCL low (cycle n+1) to SDA change 0.3 0.2 ms tR SCL and SDA Rise Time 1000 300 ns tF SCL and SDA Fall Time 300 300 ns tSU:DAT Data In Setup Time 250 100 ns tHD:DAT Data In Hold Time 0 0 ns TI Noise Filter SCL & SDA Noise Suppression 100 100 ns tWR Write Cycle Time 5 5 ms MEMORY AC OPERATING CHARACTERISTICS TA = -40°C to +85°C 2037 PGM T5.1 tSU:STO tBUF tSU:DAT tHD:DAT tDH tHIGH tLOW tR tF tSU:SDA tHD:SDA SDA Out SDA In SCL tAA 2037 ILL11.0 A C K A 2 A 1 B 0 R / W A C K D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 A C K D 7 D 6 D 1 D 0 S T O P S T A R T D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 S T A R T A C K A 2 A 1 B 0 R / W A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 A C K D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 A C K D 7 D 6 D 1 D 0 A C K S T O P Typical Write Operation Typical Read Operation Master SDA Slave Master SDA Slave 2037 ILL12.0 |
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Similar Description - SMH4042S-AKM |
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