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ADS1255IDB Datasheet(PDF) 3 Page - Burr-Brown (TI) |
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ADS1255IDB Datasheet(HTML) 3 Page - Burr-Brown (TI) |
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3 / 39 page  ADS1255 ADS1256 SBAS288D − JUNE 2003 − REVISED AUGUST 2004 www.ti.com 3 ELECTRICAL CHARACTERISTICS All specifications at −40 °C to +85°C, AVDD = +5V, DVDD = +1.8V, fCLKIN = 7.68MHz, PGA = 1, and VREF = +2.5V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Analog Inputs Full-scale input voltage (AINP − AINN) ±2VREF/PGA V Absolute input voltage (AIN0-7, AINCOM to AGND) Buffer off AGND − 0.1 AVDD + 0.1 V Absolute input voltage (AIN0-7, AINCOM to AGND) Buffer on AGND AVDD − 2.0 V Programmable gain amplifier 1 64 Buffer off, PGA = 1, 2, 4, 8, 16 150/PGA k Ω Differential input impedance Buffer off, PGA = 32, 64 4.7 k Ω Differential input impedance Buffer on, fDATA ≤ 50Hz(1) 80 M Ω SDCS[1:0] = 01 0.5 µA Sensor detect current sources SDCS[1:0] = 10 2 µA Sensor detect current sources SDCS[1:0] = 11 10 µA System Performance Resolution 24 Bit No missing codes All data rates and PGA settings 24 Bit Data rate (fDATA) fCLKIN = 7.68MHz 2.5 30,000 SPS(2) Integral nonlinearity Differential input, PGA = 1 ±0.0003 ±0.0010 %FSR(3) Integral nonlinearity Differential input, PGA = 64 ±0.0007 %FSR Offset error After calibration On the level of the noise Offset drift PGA = 1 ±100 nV/ °C Offset drift PGA = 64 ±4 nV/ °C Gain error After calibration, PGA = 1, Buffer on ±0.005 % Gain error After calibration, PGA = 64, Buffer on ±0.03 % Gain drift PGA = 1 ±0.8 ppm/ °C Gain drift PGA = 64 ±0.8 ppm/ °C Common-mode rejection fCM(4) = 60Hz, fDATA = 30kSPS(5) 95 110 dB Noise See Noise Performance Tables AVDD power-supply rejection ±5% ∆ in AVDD 60 70 dB DVDD power-supply rejection ±10% ∆ in DVDD 100 dB Voltage Reference Inputs Reference input voltage (VREF) VREF ≡ VREFP − VREFN 0.5 2.5 2.6 V Negative reference input (VREFN) Buffer off AGND − 0.1 VREFP − 0.5 V Negative reference input (VREFN) Buffer on(6) AGND VREFP − 0.5 V Positive reference input (VREFP) Buffer off VREFN + 0.5 AVDD + 0.1 V Positive reference input (VREFP) Buffer on(6) VREFN + 0.5 AVDD − 2.0 V Voltage reference impedance fCLKIN = 7.68MHz 18.5 k Ω Digital Input/Output VIH DIN, SCLK, XTAL1/CLKIN, SYNC/PDWN, CS, RESET 0.8 DVDD 5.25 V VIH D0/CLKOUT, D1, D2, D3 0.8 DVDD DVDD V VIL DGND 0.2 DVDD V VOH IOH = 5mA 0.8 DVDD V VOL IOL = 5mA 0.2 DVDD V Input hysteresis 0.5 V Input leakage 0 < VDIGITAL INPUT < DVDD ±10 µA Master clock rate External crystal between XTAL1 and XTAL2 2 7.68 10 MHz Master clock rate External oscillator driving CLKIN 0.1 7.68 10 MHz |
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