COP888EB datasheet(1/75 Pages) NSC

Part #	COP888EB

Description	8-Bit CMOS ROM Based Microcontrollers with 8k Memory, CAN Interface, 8-Bit A/D, and USART

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Manufacturer	NSC [National Semiconductor (TI)]

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COP888EB

8-Bit CMOS ROM Based Microcontrollers with 8k

Memory, CAN Interface, 8-Bit A/D, and USART

General Description

The COP888EB ROM based microcontrollers are highly in-

tegrated COP8™ Feature core devices with 8k memory and

advanced features including a CAN 2.0B (passive) interface,

A/D and USART. These single-chip CMOS devices are

suited for applications requiring a full featured controller with

a CAN interface, low EMI, and versatile communications in-

terfaces. COP87L8EB/RB devices are pin and software

compatible 16k or 32k OTP (One Time Programmable) ver-

sions for pre-production, and for use with a range of COP8

software and hardware development tools.

Features include an 8-bit memory mapped architecture, 10

MHz CKI with 1µs instruction cycle, two multi-function 16-bit

timer/counters, WATCHDOG™ and Clock Monitor, CAN

2.0B (passive) interface, MICROWIRE/PLUS™ serial I/O,

SPI master/slave interface, fully buffered USART, 8-bit A/D

with 8 channels, two power saving HALT/IDLE modes,

MIWU, idle timer, software selectable I/O options, low EMI

4.5V to 5.5V operation, and 44/68 pin packages.

Note: A companion device with CAN interface, less I/O and

memory, and PWM timer is the COP888BC.

Devices included in this datasheet are:

Device

Memory (bytes)

RAM (bytes)

I/O Pins

Packages

Temperature

COP688EB

8k ROM

192

31

44 PLCC

-55 to +125˚C

COP888EB

8k ROM

192

31

44 PLCC

-40 to +85˚C

COP689EB

8k ROM

192

58

68 PLCC

-55 to +125˚C

COP889EB

8k ROM

192

58

68 PLCC

-40 to +85˚C

Key Features

n CAN bus interface, with Software Power save mode

n 8-bit A/D Converter with 8 channels

n Fully buffered USART

n Multi-input wake up (MIWU) on both Port L and M

n SPI Compatible Master/Slave Interface

n Quiet Design (Low Radiated Emissions)

n 8096 bytes of on-board ROM

n 192 bytes of on-board RAM

Additional Peripheral Features

n Idle timer (programmable)

n Two 16-bit timer, with two 16-bit registers supporting

— Processor independent PWM mode

— External Event counter mode

— Input capture mode

n WATCHDOG and Clock Monitor

n MICROWIRE/PLUS serial I/O

I/O Features

n Software selectable I/O options (TRI-STATE® outputs,

Push pull outputs, Weak pull up input, High impedance

input)

n Schmitt trigger inputs on Port G, L and M

n Packages: 44 PLCC with 31 I/O pins

68 PLCC with 58 I/O pins

CPU/Instruction Set Features

n 1 µs instruction cycle time

n Fourteen multi-sourced vectored interrupts servicing

— External interrupt

— Idle Timer T0

— Timers (T1 and T2) (4 Interrupts)

— MICROWIRE/PLUS and SPI

— Multi-input Wake up

— Software Trap

— CAN interface (3 interrupts)

— USART (2 Inputs)

n Versatile easy to use instruction set

n 8-bit stack pointer (SP) (Stack in RAM)

n Two 8-bit Register Indirect Memory Pointers (B, X)

Fully Static CMOS

n Two power saving modes: HALT, IDLE

n Single supply operation: 4.5V to 5.5V

n Temperature ranges: −40˚C to +85˚C and

−55˚C to +125˚C

Development Support

n Emulation and OTP devices

n Real time emulation and full program debug offered by

MetaLink Development System

COP8™, MICROWIRE™, MICROWIRE/PLUS™, and WATCHDOG™ are trademarks of National Semiconductor Corporation.

TRI-STATE® is a registered trademark of National Semiconductor Corporation.

iceMASTER® is a registered trademark of MetaLink Corporation.

September 1999

DS012837

www.national.com

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