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HCD66751BP Datasheet(PDF) 8 Page - Hitachi Semiconductor |
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HCD66751BP Datasheet(HTML) 8 Page - Hitachi Semiconductor |
8 / 96 page HD66750/1 8 HD66750/1 Block Diagram RS RW/RD* E/WR* Vcc VLCD 16 12 16 Vci C1+ IM1-0 C1- +- +- +- +- VLOUT +- GND VR RR R0 R R V1OUT V2OUT V3OUT V4OUT V5OUT OPOFF DB0-DB15 VTEST C2+ C2- CS* C3+ C3- C4+ C4- 16 C5+ C5- 16 16 16 16 C6+ C6- Instruction register (IR) Timing generator CPG Instruction decoder OSC1 OSC2 RESET* TEST System interface ¥ 16-bit bus ¥ 8-bit bus Address counter (AC) Graphic RAM (CGRAM) 4,096 bytes 128-bit latch circuit 128-bit bidirectional common shift register Common driver Segment driver LCD drive voltage selector COM1/128Ð COM128/1 SEG1/128- SEG128/1 Two-, five-, six-, and seven-times booster Contrast adjuster Drive bias controller Window cursor control Four grayscale control circuit Read data latch Bit operation |
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Similar Description - HCD66751BP |
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