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OPA657UB Datasheet(PDF) 10 Page - Texas Instruments |
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OPA657UB Datasheet(HTML) 10 Page - Texas Instruments |
10 / 20 page OPA657 10 SBOS197B www.ti.com FIGURE 1. Noninverting G = +10 Specifications and Test Circuit. FIGURE 2. Inverting G = –20 Specifications and Test Circuit. APPLICATIONS INFORMATION WIDEBAND, NON-INVERTING OPERATION The OPA657 provides a unique combination of low input voltage noise, very high gain bandwidth, and the DC precision of a trimmed JFET-input stage to give an exceptional high input impedance, high gain stage amplifier. Its very high Gain Band- width Product (GBP) can be used to either deliver high signal bandwidths at high gains, or to extend the achievable bandwidth or gain in photodiode-transimpedance applications. To achieve the full performance of the OPA657, careful attention to PC board layout and component selection is required as discussed in the following sections of this data sheet. Figure 1 shows the noninverting gain of +10 circuit used as the basis for most of the Typical Characteristics. Most of the curves were characterized using signal sources with 50 Ω driving impedance, and with measurement equipment pre- senting a 50 Ω load impedance. In Figure 1, the 50Ω shunt resistor at the VI terminal matches the source impedance of the test generator, while the 50 Ω series resistor at the V O terminal provides a matching resistor for the measurement equipment load. Generally, data sheet voltage swing speci- fications are at the output pin (VO in Figure 1) while output power specifications are at the matched 50 Ω load. The total 100 Ω load at the output combined with the 500Ω total feedback network load, presents the OPA657 with an effec- tive output load of 83 Ω for the circuit of Figure 1. bandwidth for the OPA657. For lower non-inverting gains than the minimum recommended gain of +7 for the OPA657, consider the unity gain stable JFET input OPA656. WIDEBAND, INVERTING GAIN OPERATION There can be significant benefits to operating the OPA657 as an inverting amplifier. This is particularly true when a matched input impedance is required. Figure 2 shows the inverting gain circuit used as a starting point for the typical character- istics showing inverting-mode performance. Voltage-feedback op amps, unlike current-feedback amplifi- ers, can use a wide range of resistor values to set their gain. To retain a controlled frequency response for the noninverting voltage amplifier of Figure 1, the parallel combination of RF || RG should always < 150Ω. In the noninverting configura- tion, the parallel combination of RF || RG will form a pole with the parasitic input capacitance at the inverting node of the OPA657 (including layout parasitics). For best performance, this pole should be at a frequency greater than the closed-loop OPA657 +5V –5V –V S +V S 50 Ω V O V I 50 Ω + 0.1 µF + 6.8 µF 6.8 µF R G 50 Ω R F 453 Ω 50 Ω Source 50 Ω Load 0.1 µF Driving this circuit from a 50 Ω source, and constraining the gain resistor (RG) to equal 50Ω will give both a signal bandwidth and noise advantage. RG in this case is acting as both the input termination resistor and the gain setting resistor for the circuit. Although the signal gain for the circuit of Figure 2 is double that for Figure 1, their noise gains are equal when the 50 Ω source resistor is included. This has the interesting effect of doubling the equivalent GBP for the amplifier. This can be seen in comparing the G = +10 and G = –20 small signal frequency response curves. Both show about 250MHz bandwidth, but the inverting configuration of Figure 2 is giving 6dB higher signal gain. If the signal source is actually the low impedance output of another amplifier, RG should be increased to the minimum value allowed at the output of that amplifier and RF adjusted to get the desired gain. It is critical for stable operation of the OPA657 that this driving amplifier show a very low output impedance through frequencies exceeding the expected closed-loop bandwidth for the OPA657. Figure 2 also shows the noninverting input tied directly to ground. Often, a bias current canceling resistor to ground is included here to null out the DC errors caused by the input bias currents. This is only useful when the input bias currents are matched. For a JFET part like the OPA657, the input bias currents do not match but are so low to begin with (< 5pA) that DC errors due to input bias currents are negligible. Hence, no resistor is recommended at the noninverting input for the inverting signal gain condition. OPA657 +5V –5V +V S –V S 50 Ω V O V I + 6.8 µF 0.1 µF + 6.8 µF 0.1 µF R F 1k Ω R G 50 Ω 50 Ω Source 50 Ω Load |
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