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RTL8201BL Datasheet(PDF) 25 Page - List of Unclassifed Manufacturers |
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RTL8201BL Datasheet(HTML) 25 Page - List of Unclassifed Manufacturers |
25 / 29 page ![]() RTL8201BL 2002-03-29 Rev.1.2 25 8.2.4 SNI Timing of Reception Cycle Shown is an example of transfer of a packet from PHY to MAC in SNI interface. SNI mode only runs in 10Mbps. Symbol Description Minimum Typical Maximum Unit t1 RXCLK high pulse width 36 ns t2 RXCLK low pulse width 36 ns t3 RXCLK period 80 120 ns t4 RXD0 setup to RXCLK rising edge 40 ns t5 RXD0 hold after RXCLK rising edge 40 ns t6 Receive frame to CRS high 50 ns t7 End of receive frame to CRS low 160 ns t8 Decoder acquisition time 600 1800 ns RXCLK RXD0 V IH(min) V IL(max) V IH(min) V IL(max) t 4 t 5 t 1 t 3 t 2 RXCLK RXD0 CRS TPRX+- t 6 t 7 t 8 |
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