SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05, SN75HVD06, SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

2

Thesedevices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during

storage or handling to prevent electrostatic damage to the MOS gates.

MARKED AS

SIGNALING

RATE

UNIT

LOAD

DRIVER

OUTPUT SLOPE

CONTROL

TA

PART NUMBER(2)

PLASTIC

DUAL-IN-LINE

PACKAGE

(PDIP)

SMALL OUTLINE

IC (SOIC)

PACKAGE

40 Mbps

1/2

No

SN65HVD05D

SN65HVD05P

65HVD05

VP05

10 Mbps

1/8

Yes

–40

°C to 85°C

SN65HVD06D

SN65HVD06P

65HVD06

VP06

1 Mbps

1/8

Yes

40 C to 85 C

SN65HVD07D

SN65HVD07P

65HVD07

VP07

40 Mbps

1/2

No

SN75HVD05D

SN75HVD05P

75HVD05

VN05

10 Mbps

1/8

Yes

–0

°C to 70°C

SN75HVD06D

SN75HVD06P

75HVD06

VN06

1 Mbps

1/8

Yes

0 C to 70 C

SN75HVD07D

SN75HVD07P

75HVD07

VN07

(1) For the most current specification and package information, refer to our web site at www.ti.com.

(2) The D package is available taped and reeled. Add an R suffix to the device type (i.e., SN65HVD05DR).

PACKAGE DISSIPATION RATINGS (SEE FIGURE 12 AND FIGURE 13)

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING FACTOR(1)

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C POWER

RATING

D(2)

710 mW

5.7 mW/

°C

455 mW

369 mW

D(3)

1282 mW

10.3 mW/

°C

821 mW

667 mW

P

1000 mW

8.0 mW/

°C

640 mW

520 mW

(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.

(2) Tested in accordance with the Low-K thermal metric definitions of EIA/JESD51-3

(3) Tested in accordance with the High-K thermal metric definitions of EIA/JESD51-7

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted(1) (2)

SN65HVD05, SN65HVD06, SN65HVD07

SN75HVD05, SN75HVD06, SN75HVD07

Supply voltage range, VCC

–0.3 V to 6 V

Voltage range at A or B

–9 V to 14 V

Input voltage range at D, DE, R or RE

–0.5 V to VCC + 0.5 V

Voltage input range, transient pulse, A and B, through 100

Ω (see Figure 11)

–50 V to 50 V

Human body model(3)

A, B, and GND

16 kV

Electrostatic discharge

Human body model(3)

All pins

4 kV

Electrostatic discharge

Charged-devicemodel(4)

All pins

1 kV

Continuous total power dissipation

See Dissipation Rating Table

Storage temperature range, Tstg

–65

°C to 150°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds

260

°C

(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.

(3) Tested in accordance with JEDEC Standard 22, Test Method A114-A.

(4) Tested in accordance with JEDEC Standard 22, Test Method C101.