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ADC122S706 Datasheet(PDF) 8 Page - Texas Instruments |
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ADC122S706 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 31 page DOUT CS VIH tDIS 90% 10% 90% 10% DOUT 90% 10% SCLK CS tCSSU 1 2 VIL 2.4V 0.8V DOUT SCLK tDH tDA DOUT tf tr 2.4V 0.8V DOUTB SCLK CS tCONV MSB tACQ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 HI-Z DB10 DB9 DB8 DB7 DB6 DB11 DB5 DB4 DB3 DB2 DB1 DB0 LSB tCONV tACQ 3 4 5 6 1 2 7 8 MSB DB10 DB9 DB8 DB11 DOUTA MSB HI-Z DB10 DB9 DB8 DB7 DB6 DB11 DB5 DB4 DB3 DB2 DB1 DB0 LSB MSB DB10 DB9 DB8 DB11 tPD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 tACQ tCONV DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DOUTA SCLK CS 4 Leading Zeroes 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 tPower Down DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DOUTA SCLK CS 4 Leading Zeroes Channel A Data Channel B Data ADC122S706 SNAS408A – NOVEMBER 2007 – REVISED MARCH 2013 www.ti.com Figure 2. ADC122S706 Single Conversion Timing Diagram (SINGLE Data Output Mode) Figure 3. ADC122S706 Continuous Conversion Timing Diagram (DUAL Data Output Mode) Figure 4. DOUT Rise and Fall Times Figure 5. DOUT Hold and Access Times Figure 6. Valid CS Assertion Times Figure 7. Voltage Waveform for tDIS 8 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: ADC122S706 |
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