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ADS5292IPFPT Datasheet(PDF) 6 Page - Texas Instruments |
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ADS5292IPFPT Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 67 page  ADS5292 SLAS788B – NOVEMBER 2011 – REVISED JULY 2012 www.ti.com RECOMMENDED OPERATING CONDITIONS MIN TYP MAX UNIT SUPPLIES AVDD Analog supply voltage 1.7 1.8 1.9 V LVDD Digital supply voltage 1.7 1.8 1.9 V ANALOG INPUTS / OUTPUTS Differential input voltage range 2 VPP Input common-mode voltage 0.95±0.05 V REFT External reference mode 1.45 V REFB External reference mode 0.45 V VCM External Reference mode Input 1.5 V Common-mode voltage output 0.95 V Maximum Input Frequency (1) 2 VPP amplitude 80 MHz CLOCK INPUTS ADC Clock input sample rate 10 80 MSPS Sine wave, AC-coupled 0.2 1.5 Input Clock amplitude differential (V(CLKP) - LVPECL, AC-coupled 0.2 1.6 VPP V(CLKN)) peak-to-peak LVDS, AC-coupled 0.2 0.7 VIL <0.3 V Input Clock CMOS single-ended (V(CLKP)) VIH >1.5 V Input clock duty cycle 35% 50% 65% DIGITAL OUTPUTS 1x (sample MSPS ACLKP and ACLKN outputs (LVDS), 1-wire interface rate) 6x (sample MSPS LCLKP and LCLKN outputs (LVDS), 1-wire interface rate) 0.5x (sample MSPS ACLKP and ACLKN outputs (LVDS), 2-wire interface rate) 3x (sample MSPS LCLKP and LCLKN outputs (LVDS), 2-wire interface rate) Maximum data rate, 2-wire interface 480 MSPS Maximum data rate, 1-wire interface 960 MSPS CLOAD Maximum external capacitance from each output pin to LGND 5 pF RLOAD Differential load resistance between the LVDS output pairs 100 Ω TA Operating free-air temperature -40 85 °C (1) See the Large and Small Signal Input Bandwidth section. 6 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s) :ADS5292 |
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